From 760efe6910d5743084b586d3d0a3b65aea96fb2f Mon Sep 17 00:00:00 2001 From: Mac Lin Date: Thu, 25 Nov 2010 23:58:00 +0800 Subject: USB: cns3xxx: Add EHCI and OHCI bus glue for cns3xxx SOCs The CNS3XXX SOC has include USB EHCI and OHCI compatible controllers. This patch adds the necessary glue logic to allow ehci-hcd and ohci-hcd drivers to work on CNS3XXX The EHCI and OHCI controllers share a common clock control and reset bit, therefore additional check for the timming of enabling and disabling is required. The USB bit of PLL Power Down Control is also shared by OTG, 24MHzUART clock, Crypto clock, PCIe reference clock, and Clock Scale Generator. Therefore we only ensure it is enabled, while not disabling it. Signed-off-by: Mac Lin Acked-by: Alan Stern Acked-by: Greg Kroah-Hartman Signed-off-by: Anton Vorontsov --- drivers/usb/Kconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/usb/Kconfig') diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 67eb3770868f..5a7c8f1d76c6 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -41,6 +41,7 @@ config USB_ARCH_HAS_OHCI default y if MFD_TC6393XB default y if ARCH_W90X900 default y if ARCH_DAVINCI_DA8XX + default y if ARCH_CNS3XXX # PPC: default y if STB03xxx default y if PPC_MPC52xx @@ -66,6 +67,7 @@ config USB_ARCH_HAS_EHCI default y if ARCH_AT91SAM9G45 default y if ARCH_MXC default y if ARCH_OMAP3 + default y if ARCH_CNS3XXX default PCI # ARM SA1111 chips have a non-PCI based "OHCI-compatible" USB host interface. -- cgit v1.2.3