From 743fcce0a89e04dc511b4ea40eba8e3f7cec92d4 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sun, 2 Jun 2013 01:33:56 +0400 Subject: ehci-platform: add pre_setup() method to platform data Sometimes there is a need to initialize some non-standard registers mapped to the EHCI region before accessing the standard EHCI registers. Add pre_setup() method with 'struct usb_hcd *' parameter to be called just before ehci_setup() to the 'ehci-platform' driver's platform data for this purpose... While at it, add the missing incomplete declaration of 'struct platform_device' to ... The patch has been tested on the Marzen and BOCK-W boards. Suggested-by: Alan Stern Signed-off-by: Sergei Shtylyov Acked-by: Kuninori Morimoto Acked-by: Alan Stern Signed-off-by: Simon Horman --- drivers/usb/host/ehci-platform.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers/usb') diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c index f47f2594c9d4..d1f5cea435aa 100644 --- a/drivers/usb/host/ehci-platform.c +++ b/drivers/usb/host/ehci-platform.c @@ -48,6 +48,12 @@ static int ehci_platform_reset(struct usb_hcd *hcd) ehci->big_endian_desc = pdata->big_endian_desc; ehci->big_endian_mmio = pdata->big_endian_mmio; + if (pdata->pre_setup) { + retval = pdata->pre_setup(hcd); + if (retval < 0) + return retval; + } + ehci->caps = hcd->regs + pdata->caps_offset; retval = ehci_setup(hcd); if (retval) -- cgit v1.2.3 From 463c824bb708b47a7a249bde07af4d701cacd54e Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sun, 2 Jun 2013 01:42:26 +0400 Subject: phy-rcar-usb: remove EHCI internal buffer setup Now that the EHCI internal buffer setup is done by the platform code, we can remove such code from this driver as it never really belonged here. We also no longer need the 2nd memory region now (2nd EHCI controller is simply missing in e.g. R8A7778 SoC). The patch has been tested on the Marzen and BOCK-W boards. Signed-off-by: Sergei Shtylyov Acked-by: Kuninori Morimoto Acked-by: Felipe Balbi Signed-off-by: Simon Horman --- drivers/usb/phy/phy-rcar-usb.c | 28 ++++------------------------ 1 file changed, 4 insertions(+), 24 deletions(-) (limited to 'drivers/usb') diff --git a/drivers/usb/phy/phy-rcar-usb.c b/drivers/usb/phy/phy-rcar-usb.c index a35681b0c501..4893dbde4ee1 100644 --- a/drivers/usb/phy/phy-rcar-usb.c +++ b/drivers/usb/phy/phy-rcar-usb.c @@ -23,8 +23,6 @@ #define USBEH0 0x080C #define USBOH0 0x081C #define USBCTL0 0x0858 -#define EIIBC1 0x0094 -#define EIIBC2 0x009C /* USBPCTRL1 */ #define PHY_RST (1 << 2) @@ -40,7 +38,6 @@ struct rcar_usb_phy_priv { spinlock_t lock; void __iomem *reg0; - void __iomem *reg1; int counter; }; @@ -59,7 +56,6 @@ static int rcar_usb_phy_init(struct usb_phy *phy) struct rcar_usb_phy_priv *priv = usb_phy_to_priv(phy); struct device *dev = phy->dev; void __iomem *reg0 = priv->reg0; - void __iomem *reg1 = priv->reg1; int i; u32 val; unsigned long flags; @@ -96,19 +92,6 @@ static int rcar_usb_phy_init(struct usb_phy *phy) /* set platform specific port settings */ iowrite32(0x00000000, (reg0 + USBPCTRL0)); - /* - * EHCI IP internal buffer setting - * EHCI IP internal buffer enable - * - * These are recommended value of a datasheet - * see [USB :: EHCI internal buffer setting] - */ - iowrite32(0x00ff0040, (reg0 + EIIBC1)); - iowrite32(0x00ff0040, (reg1 + EIIBC1)); - - iowrite32(0x00000001, (reg0 + EIIBC2)); - iowrite32(0x00000001, (reg1 + EIIBC2)); - /* * Bus alignment settings */ @@ -145,14 +128,13 @@ static void rcar_usb_phy_shutdown(struct usb_phy *phy) static int rcar_usb_phy_probe(struct platform_device *pdev) { struct rcar_usb_phy_priv *priv; - struct resource *res0, *res1; + struct resource *res0; struct device *dev = &pdev->dev; - void __iomem *reg0, *reg1; + void __iomem *reg0; int ret; res0 = platform_get_resource(pdev, IORESOURCE_MEM, 0); - res1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); - if (!res0 || !res1) { + if (!res0) { dev_err(dev, "Not enough platform resources\n"); return -EINVAL; } @@ -164,8 +146,7 @@ static int rcar_usb_phy_probe(struct platform_device *pdev) * this driver can't use devm_request_and_ioremap(dev, res) here */ reg0 = devm_ioremap_nocache(dev, res0->start, resource_size(res0)); - reg1 = devm_ioremap_nocache(dev, res1->start, resource_size(res1)); - if (!reg0 || !reg1) { + if (!reg0) { dev_err(dev, "ioremap error\n"); return -ENOMEM; } @@ -177,7 +158,6 @@ static int rcar_usb_phy_probe(struct platform_device *pdev) } priv->reg0 = reg0; - priv->reg1 = reg1; priv->counter = 0; priv->phy.dev = dev; priv->phy.label = dev_name(dev); -- cgit v1.2.3 From 725bf9dcafe16aa69c8ab34c63ba36c6eb4492f2 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sun, 2 Jun 2013 01:50:25 +0400 Subject: phy-rcar-usb: correct base address The memory region that is used by the driver overlaps EHCI and OHCI register regions for absolutely no reason now -- fix it by adding offset of 0x800 to the base address, changing the register #define's accordingly. This has extra positive effect that we now can use devm_ioremap_resource()... Note that the driver and the SoC code have to be in one patch to keep the code bisectable... The patch has been tested on the Marzen board. Signed-off-by: Sergei Shtylyov Acked-by: Kuninori Morimoto Acked-by: Felipe Balbi Signed-off-by: Simon Horman --- drivers/usb/phy/phy-rcar-usb.c | 28 ++++++++++------------------ 1 file changed, 10 insertions(+), 18 deletions(-) (limited to 'drivers/usb') diff --git a/drivers/usb/phy/phy-rcar-usb.c b/drivers/usb/phy/phy-rcar-usb.c index 4893dbde4ee1..d636cc742e8f 100644 --- a/drivers/usb/phy/phy-rcar-usb.c +++ b/drivers/usb/phy/phy-rcar-usb.c @@ -16,13 +16,13 @@ #include #include -/* USBH common register */ -#define USBPCTRL0 0x0800 -#define USBPCTRL1 0x0804 -#define USBST 0x0808 -#define USBEH0 0x080C -#define USBOH0 0x081C -#define USBCTL0 0x0858 +/* REGS block */ +#define USBPCTRL0 0x00 +#define USBPCTRL1 0x04 +#define USBST 0x08 +#define USBEH0 0x0C +#define USBOH0 0x1C +#define USBCTL0 0x58 /* USBPCTRL1 */ #define PHY_RST (1 << 2) @@ -139,17 +139,9 @@ static int rcar_usb_phy_probe(struct platform_device *pdev) return -EINVAL; } - /* - * CAUTION - * - * Because this phy address is also mapped under OHCI/EHCI address area, - * this driver can't use devm_request_and_ioremap(dev, res) here - */ - reg0 = devm_ioremap_nocache(dev, res0->start, resource_size(res0)); - if (!reg0) { - dev_err(dev, "ioremap error\n"); - return -ENOMEM; - } + reg0 = devm_ioremap_resource(dev, res0); + if (IS_ERR(reg0)) + return PTR_ERR(reg0); priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) { -- cgit v1.2.3 From 7173e59e6b5f9cbde3ece66ae664454edcac6382 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sun, 2 Jun 2013 01:57:18 +0400 Subject: phy-rcar-usb: handle platform data Set the USBPCTRL0 register from the passed platform data in rcar_usb_phy_init(); don't reset it to 0 in rcar_usb_phy_shutdown() anymore as that does not make sense. Also, don't allow the driver's probe to succeed when the platform data are not supplied with a device. The patch has been tested on the Marzen and BOCK-W boards. Signed-off-by: Sergei Shtylyov Acked-by: Kuninori Morimoto Acked-by: Simon Horman Acked-by: Felipe Balbi Signed-off-by: Simon Horman --- drivers/usb/phy/phy-rcar-usb.c | 51 +++++++++++++++++++++++++++++++++++++----- 1 file changed, 45 insertions(+), 6 deletions(-) (limited to 'drivers/usb') diff --git a/drivers/usb/phy/phy-rcar-usb.c b/drivers/usb/phy/phy-rcar-usb.c index d636cc742e8f..823b2bb807d2 100644 --- a/drivers/usb/phy/phy-rcar-usb.c +++ b/drivers/usb/phy/phy-rcar-usb.c @@ -1,8 +1,9 @@ /* * Renesas R-Car USB phy driver * - * Copyright (C) 2012 Renesas Solutions Corp. + * Copyright (C) 2012-2013 Renesas Solutions Corp. * Kuninori Morimoto + * Copyright (C) 2013 Cogent Embedded, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -15,6 +16,7 @@ #include #include #include +#include /* REGS block */ #define USBPCTRL0 0x00 @@ -24,6 +26,25 @@ #define USBOH0 0x1C #define USBCTL0 0x58 +/* USBPCTRL0 */ +#define OVC2 (1 << 10) /* Switches the OVC input pin for port 2: */ + /* 1: USB_OVC2, 0: OVC2 */ +#define OVC1_VBUS1 (1 << 9) /* Switches the OVC input pin for port 1: */ + /* 1: USB_OVC1, 0: OVC1/VBUS1 */ + /* Function mode: set to 0 */ +#define OVC0 (1 << 8) /* Switches the OVC input pin for port 0: */ + /* 1: USB_OVC0 pin, 0: OVC0 */ +#define OVC2_ACT (1 << 6) /* Host mode: OVC2 polarity: */ + /* 1: active-high, 0: active-low */ +#define PENC (1 << 4) /* Function mode: output level of PENC1 pin: */ + /* 1: high, 0: low */ +#define OVC0_ACT (1 << 3) /* Host mode: OVC0 polarity: */ + /* 1: active-high, 0: active-low */ +#define OVC1_ACT (1 << 1) /* Host mode: OVC1 polarity: */ + /* 1: active-high, 0: active-low */ + /* Function mode: be sure to set to 1 */ +#define PORT1 (1 << 0) /* Selects port 1 mode: */ + /* 1: function, 0: host */ /* USBPCTRL1 */ #define PHY_RST (1 << 2) #define PLL_ENB (1 << 1) @@ -55,7 +76,9 @@ static int rcar_usb_phy_init(struct usb_phy *phy) { struct rcar_usb_phy_priv *priv = usb_phy_to_priv(phy); struct device *dev = phy->dev; + struct rcar_phy_platform_data *pdata = dev->platform_data; void __iomem *reg0 = priv->reg0; + static const u8 ovcn_act[] = { OVC0_ACT, OVC1_ACT, OVC2_ACT }; int i; u32 val; unsigned long flags; @@ -89,8 +112,21 @@ static int rcar_usb_phy_init(struct usb_phy *phy) /* (4) USB-PHY reset clear */ iowrite32(PHY_ENB | PLL_ENB | PHY_RST, (reg0 + USBPCTRL1)); - /* set platform specific port settings */ - iowrite32(0x00000000, (reg0 + USBPCTRL0)); + /* Board specific port settings */ + val = 0; + if (pdata->port1_func) + val |= PORT1; + if (pdata->penc1) + val |= PENC; + for (i = 0; i < 3; i++) { + /* OVCn bits follow each other in the right order */ + if (pdata->ovc_pin[i].select_3_3v) + val |= OVC0 << i; + /* OVCn_ACT bits are spaced by irregular intervals */ + if (pdata->ovc_pin[i].active_high) + val |= ovcn_act[i]; + } + iowrite32(val, (reg0 + USBPCTRL0)); /* * Bus alignment settings @@ -117,10 +153,8 @@ static void rcar_usb_phy_shutdown(struct usb_phy *phy) spin_lock_irqsave(&priv->lock, flags); - if (priv->counter-- == 1) { /* last user */ - iowrite32(0x00000000, (reg0 + USBPCTRL0)); + if (priv->counter-- == 1) /* last user */ iowrite32(0x00000000, (reg0 + USBPCTRL1)); - } spin_unlock_irqrestore(&priv->lock, flags); } @@ -133,6 +167,11 @@ static int rcar_usb_phy_probe(struct platform_device *pdev) void __iomem *reg0; int ret; + if (!pdev->dev.platform_data) { + dev_err(dev, "No platform data\n"); + return -EINVAL; + } + res0 = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res0) { dev_err(dev, "Not enough platform resources\n"); -- cgit v1.2.3 From 54407f190c8d542572a9547ba5460d811810b6e4 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sun, 9 Jun 2013 00:34:36 +0400 Subject: phy-rcar-usb: add R8A7778 support The driver currently only supports R8A7779 SoC. Compared to it, R8A7778 USB-PHY has extra register range containing two high-speed signal quality characteristic control registers which should be set up during USB-PHY startup depending on whether a ferrite bead is in use or not. So, we now handle an optional second memory range in the driver's probe method, add the 'ferrite_bead' field to the driver's platform data, and add an extra (optional) step to the USB-PHY startup routine which sets up the extended registers. Also mark in the driver's Kconfig section that R8A7778 is now supported and generally clarify that section, uppercasing the word "phy" and also changing the module name that got lost in the big driver rename, while at it... The patch has been tested on the Marzen and BOCK-W boards. Signed-off-by: Sergei Shtylyov Acked-by: Felipe Balbi Signed-off-by: Simon Horman --- drivers/usb/phy/Kconfig | 10 +++++----- drivers/usb/phy/phy-rcar-usb.c | 37 +++++++++++++++++++++++++++++++------ 2 files changed, 36 insertions(+), 11 deletions(-) (limited to 'drivers/usb') diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index 371d0e74e909..ac0b98f78c70 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig @@ -181,15 +181,15 @@ config USB_MXS_PHY MXS Phy is used by some of the i.MX SoCs, for example imx23/28/6x. config USB_RCAR_PHY - tristate "Renesas R-Car USB phy support" + tristate "Renesas R-Car USB PHY support" depends on USB || USB_GADGET help - Say Y here to add support for the Renesas R-Car USB phy driver. - This chip is typically used as USB phy for USB host, gadget. - This driver supports: R8A7779 + Say Y here to add support for the Renesas R-Car USB common PHY driver. + This chip is typically used as USB PHY for USB host, gadget. + This driver supports R8A7778 and R8A7779. To compile this driver as a module, choose M here: the - module will be called rcar-phy. + module will be called phy-rcar-usb. config USB_ULPI bool "Generic ULPI Transceiver Driver" diff --git a/drivers/usb/phy/phy-rcar-usb.c b/drivers/usb/phy/phy-rcar-usb.c index 823b2bb807d2..ae909408958d 100644 --- a/drivers/usb/phy/phy-rcar-usb.c +++ b/drivers/usb/phy/phy-rcar-usb.c @@ -26,15 +26,21 @@ #define USBOH0 0x1C #define USBCTL0 0x58 +/* High-speed signal quality characteristic control registers (R8A7778 only) */ +#define HSQCTL1 0x24 +#define HSQCTL2 0x28 + /* USBPCTRL0 */ -#define OVC2 (1 << 10) /* Switches the OVC input pin for port 2: */ +#define OVC2 (1 << 10) /* (R8A7779 only) */ + /* Switches the OVC input pin for port 2: */ /* 1: USB_OVC2, 0: OVC2 */ #define OVC1_VBUS1 (1 << 9) /* Switches the OVC input pin for port 1: */ /* 1: USB_OVC1, 0: OVC1/VBUS1 */ /* Function mode: set to 0 */ #define OVC0 (1 << 8) /* Switches the OVC input pin for port 0: */ /* 1: USB_OVC0 pin, 0: OVC0 */ -#define OVC2_ACT (1 << 6) /* Host mode: OVC2 polarity: */ +#define OVC2_ACT (1 << 6) /* (R8A7779 only) */ + /* Host mode: OVC2 polarity: */ /* 1: active-high, 0: active-low */ #define PENC (1 << 4) /* Function mode: output level of PENC1 pin: */ /* 1: high, 0: low */ @@ -59,6 +65,7 @@ struct rcar_usb_phy_priv { spinlock_t lock; void __iomem *reg0; + void __iomem *reg1; int counter; }; @@ -78,6 +85,7 @@ static int rcar_usb_phy_init(struct usb_phy *phy) struct device *dev = phy->dev; struct rcar_phy_platform_data *pdata = dev->platform_data; void __iomem *reg0 = priv->reg0; + void __iomem *reg1 = priv->reg1; static const u8 ovcn_act[] = { OVC0_ACT, OVC1_ACT, OVC2_ACT }; int i; u32 val; @@ -96,7 +104,16 @@ static int rcar_usb_phy_init(struct usb_phy *phy) /* (2) start USB-PHY internal PLL */ iowrite32(PHY_ENB | PLL_ENB, (reg0 + USBPCTRL1)); - /* (3) USB module status check */ + /* (3) set USB-PHY in accord with the conditions of usage */ + if (reg1) { + u32 hsqctl1 = pdata->ferrite_bead ? 0x41 : 0; + u32 hsqctl2 = pdata->ferrite_bead ? 0x0d : 7; + + iowrite32(hsqctl1, reg1 + HSQCTL1); + iowrite32(hsqctl2, reg1 + HSQCTL2); + } + + /* (4) USB module status check */ for (i = 0; i < 1024; i++) { udelay(10); val = ioread32(reg0 + USBST); @@ -109,7 +126,7 @@ static int rcar_usb_phy_init(struct usb_phy *phy) goto phy_init_end; } - /* (4) USB-PHY reset clear */ + /* (5) USB-PHY reset clear */ iowrite32(PHY_ENB | PLL_ENB | PHY_RST, (reg0 + USBPCTRL1)); /* Board specific port settings */ @@ -162,9 +179,9 @@ static void rcar_usb_phy_shutdown(struct usb_phy *phy) static int rcar_usb_phy_probe(struct platform_device *pdev) { struct rcar_usb_phy_priv *priv; - struct resource *res0; + struct resource *res0, *res1; struct device *dev = &pdev->dev; - void __iomem *reg0; + void __iomem *reg0, *reg1 = NULL; int ret; if (!pdev->dev.platform_data) { @@ -182,6 +199,13 @@ static int rcar_usb_phy_probe(struct platform_device *pdev) if (IS_ERR(reg0)) return PTR_ERR(reg0); + res1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (res1) { + reg1 = devm_ioremap_resource(dev, res1); + if (IS_ERR(reg1)) + return PTR_ERR(reg1); + } + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) { dev_err(dev, "priv data allocation error\n"); @@ -189,6 +213,7 @@ static int rcar_usb_phy_probe(struct platform_device *pdev) } priv->reg0 = reg0; + priv->reg1 = reg1; priv->counter = 0; priv->phy.dev = dev; priv->phy.label = dev_name(dev); -- cgit v1.2.3 From 58d5b72088ccee4eafb12b5b4433471e7438c453 Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Wed, 19 Jun 2013 01:25:48 +0900 Subject: USB: Check for ARCH_EXYNOS separately ARCH_EXYNOS is going to be excluded from PLAT_S5P, so it must be checked separately in Exynos-related Kconfig entries. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park Signed-off-by: Kukjin Kim --- drivers/usb/Kconfig | 1 + drivers/usb/host/Kconfig | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/usb') diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 92e1dc94ecc8..a3b48b5ea8d3 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -43,6 +43,7 @@ config USB_ARCH_HAS_EHCI default y if ARCH_VT8500 default y if PLAT_SPEAR default y if PLAT_S5P + default y if ARCH_EXYNOS default y if ARCH_MSM default y if MICROBLAZE default y if SPARC_LEON diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 344d5e2f87d7..922a65d361c8 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -225,7 +225,7 @@ config USB_EHCI_SH config USB_EHCI_S5P tristate "EHCI support for Samsung S5P/EXYNOS SoC Series" - depends on PLAT_S5P + depends on PLAT_S5P || ARCH_EXYNOS help Enable support for the Samsung S5Pxxxx and Exynos3/4/5 SOC's on-chip EHCI controller. -- cgit v1.2.3