From 1e5cf1452eb0f17b6bd6d51786c7b39ba175f340 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Wed, 1 Dec 2021 02:23:40 +0300 Subject: soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30 All device drivers got runtime PM and OPP support. Flip the core domain support status for Tegra20 and Tegra30 SoCs. Reviewed-by: Ulf Hansson Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- drivers/soc/tegra/pmc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 5aceacbd8ce0..bf6e84aa0e33 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -3066,7 +3066,7 @@ static void tegra20_pmc_setup_irq_polarity(struct tegra_pmc *pmc, } static const struct tegra_pmc_soc tegra20_pmc_soc = { - .supports_core_domain = false, + .supports_core_domain = true, .num_powergates = ARRAY_SIZE(tegra20_powergates), .powergates = tegra20_powergates, .num_cpu_powergates = 0, @@ -3127,7 +3127,7 @@ static const char * const tegra30_reset_sources[] = { }; static const struct tegra_pmc_soc tegra30_pmc_soc = { - .supports_core_domain = false, + .supports_core_domain = true, .num_powergates = ARRAY_SIZE(tegra30_powergates), .powergates = tegra30_powergates, .num_cpu_powergates = ARRAY_SIZE(tegra30_cpu_powergates), -- cgit v1.2.3 From 6f259bf1619bbff6118c1e556044c0cb4020bbb6 Mon Sep 17 00:00:00 2001 From: kartik Date: Mon, 6 Dec 2021 17:22:45 +0530 Subject: soc/tegra: fuse: Update nvmem cell list Update tegra_fuse_cells with below entries: - gcplex-config-fuse: Configuration bits for GPU, used to enable/disable write protected region used for storing GPU firmware. - pdi0: Unique per chip public identifier. - pdi1: Unique per chip public identifier. Signed-off-by: Prathamesh Shete Signed-off-by: Kartik Signed-off-by: Thierry Reding --- drivers/soc/tegra/fuse/fuse-tegra.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c index 913103ee5432..10d2ae99babd 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra.c +++ b/drivers/soc/tegra/fuse/fuse-tegra.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2013-2021, NVIDIA CORPORATION. All rights reserved. */ #include @@ -161,6 +161,12 @@ static const struct nvmem_cell_info tegra_fuse_cells[] = { .bytes = 4, .bit_offset = 0, .nbits = 32, + }, { + .name = "gcplex-config-fuse", + .offset = 0x1c8, + .bytes = 4, + .bit_offset = 0, + .nbits = 32, }, { .name = "tsensor-realignment", .offset = 0x1fc, @@ -179,6 +185,18 @@ static const struct nvmem_cell_info tegra_fuse_cells[] = { .bytes = 4, .bit_offset = 0, .nbits = 32, + }, { + .name = "pdi0", + .offset = 0x300, + .bytes = 4, + .bit_offset = 0, + .nbits = 32, + }, { + .name = "pdi1", + .offset = 0x304, + .bytes = 4, + .bit_offset = 0, + .nbits = 32, }, }; -- cgit v1.2.3 From b631c9c2ae934ce2a563853e8e6a591f7d34b48b Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 24 Feb 2022 13:27:28 +0100 Subject: soc/tegra: fuse: Explicitly cast to/from __iomem sparse is picky about casts between different address spaces. A cast to plain void * needs to be accompanied by a __force modifier and casting back to void __iomem * needs to be explicit to avoid warnings. Reported-by: kernel test robot Fixes: 88724b78a84c ("soc/tegra: fuse: Use resource-managed helpers") Signed-off-by: Thierry Reding Reviewed-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- drivers/soc/tegra/fuse/fuse-tegra.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c index 10d2ae99babd..aa94fda282f4 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra.c +++ b/drivers/soc/tegra/fuse/fuse-tegra.c @@ -202,8 +202,8 @@ static const struct nvmem_cell_info tegra_fuse_cells[] = { static void tegra_fuse_restore(void *base) { + fuse->base = (void __iomem *)base; fuse->clk = NULL; - fuse->base = base; } static int tegra_fuse_probe(struct platform_device *pdev) @@ -213,7 +213,7 @@ static int tegra_fuse_probe(struct platform_device *pdev) struct resource *res; int err; - err = devm_add_action(&pdev->dev, tegra_fuse_restore, base); + err = devm_add_action(&pdev->dev, tegra_fuse_restore, (void __force *)base); if (err) return err; -- cgit v1.2.3 From 194217df813a78234130576eaabbfe2524eae70c Mon Sep 17 00:00:00 2001 From: kartik Date: Tue, 25 Jan 2022 11:27:42 +0530 Subject: soc/tegra: pmc: Add Tegra234 wake events Enable the Tegra RTC alarm and power key wake-ups for Tegra234 Signed-off-by: kartik Signed-off-by: Thierry Reding --- drivers/soc/tegra/pmc.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index bf6e84aa0e33..fdf508e03400 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -3,7 +3,7 @@ * drivers/soc/tegra/pmc.c * * Copyright (c) 2010 Google, Inc - * Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. * * Author: * Colin Cross @@ -54,6 +54,7 @@ #include #include #include +#include #include #define PMC_CNTRL 0x0 @@ -3788,6 +3789,11 @@ static const char * const tegra234_reset_sources[] = { "FUSECRC", }; +static const struct tegra_wake_event tegra234_wake_events[] = { + TEGRA_WAKE_GPIO("power", 29, 1, TEGRA234_AON_GPIO(EE, 4)), + TEGRA_WAKE_IRQ("rtc", 73, 10), +}; + static const struct tegra_pmc_soc tegra234_pmc_soc = { .supports_core_domain = false, .num_powergates = 0, @@ -3812,8 +3818,8 @@ static const struct tegra_pmc_soc tegra234_pmc_soc = { .num_reset_sources = ARRAY_SIZE(tegra234_reset_sources), .reset_levels = tegra186_reset_levels, .num_reset_levels = ARRAY_SIZE(tegra186_reset_levels), - .num_wake_events = 0, - .wake_events = NULL, + .num_wake_events = ARRAY_SIZE(tegra234_wake_events), + .wake_events = tegra234_wake_events, .pmc_clks_data = NULL, .num_pmc_clks = 0, .has_blink_output = false, -- cgit v1.2.3