From 8c5d5d6a0bc62bebed37f306b80ab125fa3fbb8d Mon Sep 17 00:00:00 2001 From: Abhishek Sahu Date: Fri, 11 Aug 2017 17:09:18 +0530 Subject: mtd: nand: qcom: add bam property for QPIC NAND controller The current driver only supports EBI2 NAND controller which uses ADM DMA. The latest QCOM SoC uses QPIC NAND controller with BAM DMA. NAND registers and programming sequence are same for EBI2 and QPIC NAND so the same driver can support QPIC NAND also by adding the BAM DMA support. This patch adds the is_bam in NAND property which will be checked for determining the DMA engine type. Reviewed-by: Archit Taneja Signed-off-by: Abhishek Sahu Signed-off-by: Boris Brezillon --- drivers/mtd/nand/qcom_nandc.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers') diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c index 79f7de82a708..2d44eeba553c 100644 --- a/drivers/mtd/nand/qcom_nandc.c +++ b/drivers/mtd/nand/qcom_nandc.c @@ -328,9 +328,11 @@ struct qcom_nand_host { * This data type corresponds to the NAND controller properties which varies * among different NAND controllers. * @ecc_modes - ecc mode for NAND + * @is_bam - whether NAND controller is using BAM */ struct qcom_nandc_props { u32 ecc_modes; + bool is_bam; }; static inline struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip) @@ -2251,6 +2253,7 @@ static int qcom_nandc_remove(struct platform_device *pdev) static const struct qcom_nandc_props ipq806x_nandc_props = { .ecc_modes = (ECC_RS_4BIT | ECC_BCH_8BIT), + .is_bam = false, }; /* -- cgit v1.2.3