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authorYu, Luming <luming.yu@intel.com>2006-04-25 00:00:34 -0700
committerGreg Kroah-Hartman <gregkh@suse.de>2006-06-11 14:02:27 -0700
commit8b8c8d280ab2d18fe6e42d671f60d4ffed451cdc (patch)
tree83702395aa09b3a4497758e3cf0e5c52761c798a
parent04d9c1a1100b6bdeffa7e1bfc30080bdac28e183 (diff)
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[PATCH] PCI: reverse pci config space restore order
According to Intel ICH spec, there are several rules that Base Address should be programmed before IOSE (PCICMD register ) enabled. For example ICH7: 12.1.3 SATA : the base address register for the bus master register should be programmed before this bit is set. 11.1.3: PCICMD (USB): The base address register for USB should be programmed before this bit is set. .... To make sure kernel code follow this rule , and prevent unnecessary confusion. I proposal this patch. Signed-off-by: Luming Yu <luming.yu@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--drivers/pci/pci.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index d2520451f36b..12286275b1c8 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -463,7 +463,11 @@ pci_restore_state(struct pci_dev *dev)
int i;
int val;
- for (i = 0; i < 16; i++) {
+ /*
+ * The Base Address register should be programmed before the command
+ * register(s)
+ */
+ for (i = 15; i >= 0; i--) {
pci_read_config_dword(dev, i * 4, &val);
if (val != dev->saved_config_space[i]) {
printk(KERN_DEBUG "PM: Writing back config space on "