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| author | Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> | 2011-09-06 17:16:35 +0900 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2011-10-04 10:10:50 -0600 |
| commit | 8b7aa961a815dad389525dcd1c36a44c249b1760 (patch) | |
| tree | e984e84c309d9c44ffac333783f65638a42c4743 | |
| parent | 27504be5c10bdc61761ec0126b3645428598ad91 (diff) | |
| download | linux-8b7aa961a815dad389525dcd1c36a44c249b1760.tar.gz linux-8b7aa961a815dad389525dcd1c36a44c249b1760.tar.bz2 linux-8b7aa961a815dad389525dcd1c36a44c249b1760.zip | |
spi-topcliff-pch: Fix SSN Control issue
During processing 1 command/data series,
SSN should keep LOW.
However, currently, SSN becomes HIGH.
This patch fixes the issue.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| -rw-r--r-- | drivers/spi/spi-topcliff-pch.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c index 7a98caa3aed2..c36d51657066 100644 --- a/drivers/spi/spi-topcliff-pch.c +++ b/drivers/spi/spi-topcliff-pch.c @@ -58,6 +58,7 @@ #define PCH_SLEEP_TIME 10 #define SSN_LOW 0x02U +#define SSN_HIGH 0x03U #define SSN_NO_CONTROL 0x00U #define PCH_MAX_CS 0xFF #define PCI_DEVICE_ID_GE_SPI 0x8816 @@ -756,10 +757,6 @@ static void pch_spi_set_ir(struct pch_spi_data *data) wait_event_interruptible(data->wait, data->transfer_complete); - pch_spi_writereg(data->master, PCH_SSNXCR, SSN_NO_CONTROL); - dev_dbg(&data->master->dev, - "%s:no more control over SSN-writing 0 to SSNXCR.", __func__); - /* clear all interrupts */ pch_spi_writereg(data->master, PCH_SPSR, pch_spi_readreg(data->master, PCH_SPSR)); @@ -848,9 +845,6 @@ static void pch_spi_start_transfer(struct pch_spi_data *data) kfree(dma->sg_rx_p); spin_lock_irqsave(&data->lock, flags); - pch_spi_writereg(data->master, PCH_SSNXCR, SSN_NO_CONTROL); - dev_dbg(&data->master->dev, - "%s:no more control over SSN-writing 0 to SSNXCR.", __func__); /* clear fifo threshold, disable interrupts, disable SPI transfer */ pch_spi_setclr_reg(data->master, PCH_SPCR, 0, @@ -1167,6 +1161,7 @@ static void pch_spi_process_messages(struct work_struct *pwork) if (data->use_dma) pch_spi_request_dma(data, data->current_msg->spi->bits_per_word); + pch_spi_writereg(data->master, PCH_SSNXCR, SSN_NO_CONTROL); do { /* If we are already processing a message get the next transfer structure from the message otherwise retrieve @@ -1227,6 +1222,7 @@ static void pch_spi_process_messages(struct work_struct *pwork) } while (data->cur_trans != NULL); + pch_spi_writereg(data->master, PCH_SSNXCR, SSN_HIGH); if (data->use_dma) pch_spi_release_dma(data); } |