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authorPatrik Jakobsson <patrik.r.jakobsson@gmail.com>2013-11-07 02:34:12 +0100
committerPatrik Jakobsson <patrik.r.jakobsson@gmail.com>2013-11-08 16:22:12 +0100
commit99d754bb46e41cf88f6e5d96dd3c6c3b9c3bddb3 (patch)
tree8f26788e5e86d04c15dd872cf2a8f27b0270e0e1
parentfb8e34d561d58297af06b7350d9fdcafced8e1c5 (diff)
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drm/gma500/mrst: Replace WMs and chickenbits with values from EMGD
For the minnowboard to work the values found in EMGD are required. This might break Oaktrail but without hardware to test with I cannot really tell (and do not really care). Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-rw-r--r--drivers/gpu/drm/gma500/oaktrail_crtc.c13
1 files changed, 6 insertions, 7 deletions
diff --git a/drivers/gpu/drm/gma500/oaktrail_crtc.c b/drivers/gpu/drm/gma500/oaktrail_crtc.c
index 25bf206b46f2..8195e8592107 100644
--- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
@@ -332,16 +332,15 @@ static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int mode)
break;
}
- /*Set FIFO Watermarks*/
- REG_WRITE(DSPARB, 0x3FFF);
- REG_WRITE(DSPFW1, 0x3F88080A);
- REG_WRITE(DSPFW2, 0x0b060808);
+ /* Set FIFO Watermarks (values taken from EMGD) */
+ REG_WRITE(DSPARB, 0x3f80);
+ REG_WRITE(DSPFW1, 0x3f8f0404);
+ REG_WRITE(DSPFW2, 0x04040f04);
REG_WRITE(DSPFW3, 0x0);
- REG_WRITE(DSPFW4, 0x08030404);
+ REG_WRITE(DSPFW4, 0x04040404);
REG_WRITE(DSPFW5, 0x04040404);
REG_WRITE(DSPFW6, 0x78);
- REG_WRITE(0x70400, REG_READ(0x70400) | 0x4000);
- /* Must write Bit 14 of the Chicken Bit Register */
+ REG_WRITE(DSPCHICKENBIT, REG_READ(DSPCHICKENBIT) | 0xc040);
gma_power_end(dev);
}