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| author | Eric Anholt <eric@anholt.net> | 2012-01-19 10:50:06 -0800 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-01-26 00:16:48 +0100 |
| commit | fc74d8e01165b567922921d110b6d16320a61fa6 (patch) | |
| tree | 65195ddd18f34fb12b767912cf25c6779329e9d7 | |
| parent | 8d79c3490aecfe6e51f0ba6f9780746fb1434954 (diff) | |
| download | linux-fc74d8e01165b567922921d110b6d16320a61fa6.tar.gz linux-fc74d8e01165b567922921d110b6d16320a61fa6.tar.bz2 linux-fc74d8e01165b567922921d110b6d16320a61fa6.zip | |
drm/i915: Correct the bit number for the MI_FLUSH_ENABLE.
Older specs claimed this was bit 11, but newer specs and the actual
simulator code say it was bit 12. Regardless, we don't use MI_FLUSH,
or try to enable it any more.
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Anyone trying to use this bit, please read all the relevant
discussions, it's epic.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c3afb783cb9d..bbad78853482 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -391,7 +391,7 @@ #define MI_MODE 0x0209c # define VS_TIMER_DISPATCH (1 << 6) -# define MI_FLUSH_ENABLE (1 << 11) +# define MI_FLUSH_ENABLE (1 << 12) #define GFX_MODE 0x02520 #define GFX_MODE_GEN7 0x0229c |