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| author | FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> | 2010-06-29 00:38:02 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-06-29 00:38:02 -0700 |
| commit | f5fa3cb9b790db1c401f4b506d7fcc503771af0d (patch) | |
| tree | 3eaebf08f675bc807bda78724b028c83de68e152 | |
| parent | c67dda14389205f0a223c5089307495290939b3b (diff) | |
| download | linux-f5fa3cb9b790db1c401f4b506d7fcc503771af0d.tar.gz linux-f5fa3cb9b790db1c401f4b506d7fcc503771af0d.tar.bz2 linux-f5fa3cb9b790db1c401f4b506d7fcc503771af0d.zip | |
sparc: remove homegrown L1_CACHE_ALIGN macro
Let's use the standard L1_CACHE_ALIGN macro instead.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | arch/sparc/include/asm/cache.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/sparc/include/asm/cache.h b/arch/sparc/include/asm/cache.h index 0588b8c7faa2..69358b590c91 100644 --- a/arch/sparc/include/asm/cache.h +++ b/arch/sparc/include/asm/cache.h @@ -11,7 +11,6 @@ #define L1_CACHE_SHIFT 5 #define L1_CACHE_BYTES 32 -#define L1_CACHE_ALIGN(x) ((((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))) #ifdef CONFIG_SPARC32 #define SMP_CACHE_BYTES_SHIFT 5 |