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| author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-01-05 11:25:06 +0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-01-15 14:50:14 -0800 |
| commit | 9b974cc17166d31afed2638d56bdbf9829afbfaa (patch) | |
| tree | 3c129919c69d932282b7c5fb7c712914547bf9fa | |
| parent | 6251ec0ae2eb9e9e96689422358c2fdb35c63768 (diff) | |
| download | linux-9b974cc17166d31afed2638d56bdbf9829afbfaa.tar.gz linux-9b974cc17166d31afed2638d56bdbf9829afbfaa.tar.bz2 linux-9b974cc17166d31afed2638d56bdbf9829afbfaa.zip | |
drm/i915: enable 36bit physical address for hardware status page
This enables possible 36bit address mask on 965G that use physical
address for hw status page.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
| -rw-r--r-- | drivers/char/agp/intel-agp.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 4 |
2 files changed, 9 insertions, 1 deletions
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c index 30c36ac2cd00..3999a5f25f38 100644 --- a/drivers/char/agp/intel-agp.c +++ b/drivers/char/agp/intel-agp.c @@ -2460,10 +2460,14 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev, &bridge->mode); } - if (bridge->driver->mask_memory == intel_i965_mask_memory) + if (bridge->driver->mask_memory == intel_i965_mask_memory) { if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36))) dev_err(&intel_private.pcidev->dev, "set gfx device dma mask 36bit failed!\n"); + else + pci_set_consistent_dma_mask(intel_private.pcidev, + DMA_BIT_MASK(36)); + } pci_set_drvdata(pdev, bridge); return agp_add_bridge(bridge); diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index bbe47812e4b6..e660ac07f3b2 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -134,6 +134,10 @@ static int i915_init_phys_hws(struct drm_device *dev) memset(dev_priv->hw_status_page, 0, PAGE_SIZE); + if (IS_I965G(dev)) + dev_priv->dma_status_page |= (dev_priv->dma_status_page >> 28) & + 0xf0; + I915_WRITE(HWS_PGA, dev_priv->dma_status_page); DRM_DEBUG_DRIVER("Enabled hardware status page\n"); return 0; |