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authorPaul Walmsley <paul@pwsan.com>2010-02-22 22:09:18 -0700
committerPaul Walmsley <paul@pwsan.com>2010-02-24 12:15:06 -0700
commitf71eddb1582f5c53ed4bfc365a2acce94aca88cc (patch)
tree95a8a8a350b9f7712634692e287773a20772a0da
parent1a3377176b3d41e3f30483a624cdafadeeb4064f (diff)
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OMAP clock: compress clock flags down to a u8
There are now only eight OMAP clock flags, so renumber the flags to fit in a u8 and shrink the size of struct clk.flags from a u32 to a u8. The intention is to save memory. Signed-off-by: Paul Walmsley <paul@pwsan.com>
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h24
1 files changed, 9 insertions, 15 deletions
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 70cddc091325..474c21e40eab 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -125,7 +125,6 @@ struct clk {
struct list_head children;
struct list_head sibling; /* node for children */
unsigned long rate;
- __u32 flags;
void __iomem *enable_reg;
unsigned long (*recalc)(struct clk *);
int (*set_rate)(struct clk *, unsigned long);
@@ -134,6 +133,7 @@ struct clk {
__u8 enable_bit;
__s8 usecount;
u8 fixed_div;
+ u8 flags;
#ifdef CONFIG_ARCH_OMAP2PLUS
void __iomem *clksel_reg;
u32 clksel_mask;
@@ -187,20 +187,14 @@ extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
extern const struct clkops clkops_null;
/* Clock flags */
-/* bit 0 is free */
-#define RATE_FIXED (1 << 1) /* Fixed clock rate */
-/* bits 2-4 are free */
-#define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */
-/* bit 6 is free */
-#define CLOCK_IDLE_CONTROL (1 << 7)
-#define CLOCK_NO_IDLE_PARENT (1 << 8)
-#define DELAYED_APP (1 << 9) /* Delay application of clock */
-/* bit 10 is currently free */
-#define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */
-#define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */
-/* bit 13 is currently free */
-#define ALWAYS_ENABLED (1 << 14)
-/* bits 15-31 are currently free */
+#define RATE_FIXED (1 << 0) /* Fixed clock rate */
+#define ENABLE_REG_32BIT (1 << 1) /* Use 32-bit access */
+#define CLOCK_IDLE_CONTROL (1 << 2)
+#define CLOCK_NO_IDLE_PARENT (1 << 3)
+#define DELAYED_APP (1 << 4) /* Delay application of clock */
+#define ENABLE_ON_INIT (1 << 5) /* Enable upon framework init */
+#define INVERT_ENABLE (1 << 6) /* 0 enables, 1 disables */
+#define ALWAYS_ENABLED (1 << 7)
/* Clksel_rate flags */
#define DEFAULT_RATE (1 << 0)