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| author | Phil Edworthy <phil.edworthy@renesas.com> | 2012-06-23 01:12:09 +0200 |
|---|---|---|
| committer | Rafael J. Wysocki <rjw@sisk.pl> | 2012-06-23 01:12:09 +0200 |
| commit | 86f887c105b909a2cea7b06f2136d66b3438b038 (patch) | |
| tree | 1389e18eea10b053a23437d6456f9e5cd9cefaae | |
| parent | c207d2df1c1b2a160b7d52229e5a43feea6a7d26 (diff) | |
| download | linux-86f887c105b909a2cea7b06f2136d66b3438b038.tar.gz linux-86f887c105b909a2cea7b06f2136d66b3438b038.tar.bz2 linux-86f887c105b909a2cea7b06f2136d66b3438b038.zip | |
ARM: shmobile: r8a7779: Route all interrupts to ARM
Without this, the interrupts for I2C, VIN, GPIO, SDHC, HSCIF and
HPB-DMAC are sent to the SH processor.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
| -rw-r--r-- | arch/arm/mach-shmobile/intc-r8a7779.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c index 550b23df4fd4..f04fad4ec4fb 100644 --- a/arch/arm/mach-shmobile/intc-r8a7779.c +++ b/arch/arm/mach-shmobile/intc-r8a7779.c @@ -35,6 +35,9 @@ #define INT2SMSKCR3 0xfe7822ac #define INT2SMSKCR4 0xfe7822b0 +#define INT2NTSR0 0xfe700060 +#define INT2NTSR1 0xfe700064 + static int r8a7779_set_wake(struct irq_data *data, unsigned int on) { return 0; /* always allow wakeup */ @@ -49,6 +52,10 @@ void __init r8a7779_init_irq(void) gic_init(0, 29, gic_dist_base, gic_cpu_base); gic_arch_extn.irq_set_wake = r8a7779_set_wake; + /* route all interrupts to ARM */ + __raw_writel(0xffffffff, INT2NTSR0); + __raw_writel(0x3fffffff, INT2NTSR1); + /* unmask all known interrupts in INTCS2 */ __raw_writel(0xfffffff0, INT2SMSKCR0); __raw_writel(0xfff7ffff, INT2SMSKCR1); |