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authorAbhishek Sahu <absahu@codeaurora.org>2017-08-17 17:37:52 +0530
committerBoris Brezillon <boris.brezillon@free-electrons.com>2017-08-23 16:49:30 +0200
commitd440c4d3601d964dc742730a05f2534535a17f0b (patch)
tree32939172e84d89e8e56f626dbae1c308597cfdd7
parentec170cc853ad4e8c01ee71e619739b9c379eb643 (diff)
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dt-bindings: qcom_nandc: IPQ8074 QPIC NAND documentation
Qualcom IPQ8074 SoC uses QPIC NAND controller version 1.5.0 which uses BAM DMA Engine. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
-rw-r--r--Documentation/devicetree/bindings/mtd/qcom_nandc.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
index d93b952f4bd6..73d336befa08 100644
--- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
+++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
@@ -6,6 +6,8 @@ Required properties:
SoC and it uses ADM DMA
* "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in
IPQ4019 SoC and it uses BAM DMA
+ * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
+ IPQ8074 SoC and it uses BAM DMA
- reg: MMIO address range
- clocks: must contain core clock and always on clock