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| author | Dan Williams <dan.j.williams@intel.com> | 2009-09-16 15:16:50 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-16 15:16:50 -0700 |
| commit | 376ec37667b510453f5a62fcd95d762786e6a0a9 (patch) | |
| tree | 7352166b585463ce53633e379b96196dff72014f | |
| parent | 6c910a78e495b4c1778a8b136b37fe3c05712730 (diff) | |
| download | linux-376ec37667b510453f5a62fcd95d762786e6a0a9.tar.gz linux-376ec37667b510453f5a62fcd95d762786e6a0a9.tar.bz2 linux-376ec37667b510453f5a62fcd95d762786e6a0a9.zip | |
ioat2: clarify ring size limits
With the addition of ioat_max_alloc_order it is not clear what the
maximum allocation order is, so document that in the modinfo. Also take
an opportunity to kill a stray semicolon.
Signed-off-by: Maciej Sosnowski <maciej.sosnowski@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| -rw-r--r-- | drivers/dma/ioat/dma_v2.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/dma/ioat/dma_v2.c b/drivers/dma/ioat/dma_v2.c index 5d6ac49e0d32..8fd0b59f1902 100644 --- a/drivers/dma/ioat/dma_v2.c +++ b/drivers/dma/ioat/dma_v2.c @@ -42,18 +42,19 @@ int ioat_ring_alloc_order = 8; module_param(ioat_ring_alloc_order, int, 0644); MODULE_PARM_DESC(ioat_ring_alloc_order, - "ioat2+: allocate 2^n descriptors per channel (default: n=8)"); + "ioat2+: allocate 2^n descriptors per channel" + " (default: 8 max: 16)"); static int ioat_ring_max_alloc_order = IOAT_MAX_ORDER; module_param(ioat_ring_max_alloc_order, int, 0644); MODULE_PARM_DESC(ioat_ring_max_alloc_order, - "ioat2+: upper limit for dynamic ring resizing (default: n=16)"); + "ioat2+: upper limit for ring size (default: 16)"); void __ioat2_issue_pending(struct ioat2_dma_chan *ioat) { void * __iomem reg_base = ioat->base.reg_base; ioat->pending = 0; - ioat->dmacount += ioat2_ring_pending(ioat);; + ioat->dmacount += ioat2_ring_pending(ioat); ioat->issued = ioat->head; /* make descriptor updates globally visible before notifying channel */ wmb(); |