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authorTadeusz Struk <tadeusz.struk@intel.com>2014-07-25 15:56:03 -0700
committerHerbert Xu <herbert@gondor.apana.org.au>2014-08-01 22:36:10 +0800
commit4f74c3989b14338544b65360ca4f8587c63d7fd9 (patch)
treee37192227c311b287e5c424c5d24510a41eb2381
parentd9a44abf3aede89c3dbb6dfa8a95c856b9ae8da3 (diff)
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crypto: qat - Fixed SKU1 dev issue
Fix for issue with SKU1 device. SKU1 device has 8 micro engines as opposed to 12 in other SKUs so it was not possible to start the non-existing micro engines. Signed-off-by: Bo Cui <bo.cui@intel.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r--drivers/crypto/qat/qat_common/qat_uclo.c6
-rw-r--r--drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h2
2 files changed, 2 insertions, 6 deletions
diff --git a/drivers/crypto/qat/qat_common/qat_uclo.c b/drivers/crypto/qat/qat_common/qat_uclo.c
index 258009178031..1e27f9f7fddf 100644
--- a/drivers/crypto/qat/qat_common/qat_uclo.c
+++ b/drivers/crypto/qat/qat_common/qat_uclo.c
@@ -256,10 +256,6 @@ static int qat_uclo_fetch_initmem_ae(struct icp_qat_fw_loader_handle *handle,
pr_err("QAT: Parse num for AE number failed\n");
return -EINVAL;
}
- if (!test_bit(*ae, (unsigned long *)&handle->hal_handle->ae_mask)) {
- pr_err("QAT: ae %d to be init is fused off\n", *ae);
- return -EINVAL;
- }
if (*ae >= ICP_QAT_UCLO_MAX_AE) {
pr_err("QAT: ae %d out of range\n", *ae);
return -EINVAL;
@@ -456,7 +452,7 @@ static int qat_uclo_init_memory(struct icp_qat_fw_loader_handle *handle)
(sizeof(struct icp_qat_uof_memvar_attr) *
initmem->val_attr_num));
}
- for (ae = 0; ae < ICP_QAT_UCLO_MAX_AE; ae++) {
+ for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
if (qat_hal_batch_wr_lm(handle, ae,
obj_handle->lm_init_tab[ae])) {
pr_err("QAT: fail to batch init lmem for AE %d\n", ae);
diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
index c5ce236aa979..b707f292b377 100644
--- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
+++ b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
@@ -59,7 +59,7 @@
#define ADF_DH895XCC_FUSECTL_SKU_4 0x3
#define ADF_DH895XCC_MAX_ACCELERATORS 6
#define ADF_DH895XCC_MAX_ACCELENGINES 12
-#define ADF_DH895XCC_ACCELERATORS_REG_OFFSET 18
+#define ADF_DH895XCC_ACCELERATORS_REG_OFFSET 13
#define ADF_DH895XCC_ACCELERATORS_MASK 0x3F
#define ADF_DH895XCC_ACCELENGINES_MASK 0xFFF
#define ADF_DH895XCC_LEGFUSE_OFFSET 0x4C