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author | Olof Johansson <olof@lixom.net> | 2013-01-29 16:05:48 -0800 |
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committer | Olof Johansson <olof@lixom.net> | 2013-01-29 16:06:03 -0800 |
commit | 0b79f2772a0c49266e611a36d55a2d0e2a241929 (patch) | |
tree | cbb54756a3d47ecba7162741756609ce1a3229d6 | |
parent | 1576a31c61d41a0bb549a3aabd10f42c5e233de4 (diff) | |
parent | 7a4f26097d389c16c9956bc03b81532698d97d64 (diff) | |
download | linux-0b79f2772a0c49266e611a36d55a2d0e2a241929.tar.gz linux-0b79f2772a0c49266e611a36d55a2d0e2a241929.tar.bz2 linux-0b79f2772a0c49266e611a36d55a2d0e2a241929.zip |
Merge tag 'ux500-no-idh' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/cleanup
From Linus Walleij:
Removal of the <mach/id.h> include from ux500
- First an ACKed MFD patch deleting the only consumer
of these cpu_is* functions outside of mach-ux500
- Introduce a new local cpu_is_u8580() in this patch
set to avoid clashing with other patch sets.
- Finally de-globalize <mach/id.h>.
* tag 'ux500-no-idh' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: de-globalize <mach/id.h>
ARM: ux500: Introduce cpu_is_u8580()
mfd: prcmu: delete pin control helpers
Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r-- | arch/arm/mach-ux500/board-mop500-uib.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-ux500/cache-l2x0.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-ux500/cpu-db8500.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-ux500/cpu.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-ux500/id.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-ux500/id.h (renamed from arch/arm/mach-ux500/include/mach/id.h) | 21 | ||||
-rw-r--r-- | arch/arm/mach-ux500/include/mach/hardware.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-ux500/platsmp.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-ux500/timer.c | 2 | ||||
-rw-r--r-- | drivers/cpufreq/db8500-cpufreq.c | 3 | ||||
-rw-r--r-- | drivers/mfd/db8500-prcmu.c | 17 | ||||
-rw-r--r-- | include/linux/mfd/db8500-prcmu.h | 6 | ||||
-rw-r--r-- | include/linux/mfd/dbx500-prcmu.h | 81 |
13 files changed, 39 insertions, 104 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-uib.c b/arch/arm/mach-ux500/board-mop500-uib.c index 1f47d962e3a1..7037d3687e9f 100644 --- a/arch/arm/mach-ux500/board-mop500-uib.c +++ b/arch/arm/mach-ux500/board-mop500-uib.c @@ -13,6 +13,7 @@ #include <mach/hardware.h> #include "board-mop500.h" +#include "id.h" enum mop500_uib { STUIB, diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c index 75d5b512a3d5..1c1609da76ce 100644 --- a/arch/arm/mach-ux500/cache-l2x0.c +++ b/arch/arm/mach-ux500/cache-l2x0.c @@ -10,7 +10,8 @@ #include <asm/cacheflush.h> #include <asm/hardware/cache-l2x0.h> #include <mach/hardware.h> -#include <mach/id.h> + +#include "id.h" static void __iomem *l2x0_base; diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 218a6b1ada7e..d614d7150dcb 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -36,7 +36,9 @@ #include "devices-db8500.h" #include "ste-dma40-db8500.h" + #include "board-mop500.h" +#include "id.h" /* minimum static i/o mapping required to boot U8500 platforms */ static struct map_desc u8500_uart_io_desc[] __initdata = { diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 5dd90d31ffc3..506c5b2d0fad 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -28,6 +28,7 @@ #include <mach/devices.h> #include "board-mop500.h" +#include "id.h" void __iomem *_PRCMU_BASE; diff --git a/arch/arm/mach-ux500/id.c b/arch/arm/mach-ux500/id.c index d1579920139f..9f951842e1e5 100644 --- a/arch/arm/mach-ux500/id.c +++ b/arch/arm/mach-ux500/id.c @@ -17,6 +17,8 @@ #include <mach/hardware.h> #include <mach/setup.h> +#include "id.h" + struct dbx500_asic_id dbx500_id; static unsigned int ux500_read_asicid(phys_addr_t addr) diff --git a/arch/arm/mach-ux500/include/mach/id.h b/arch/arm/mach-ux500/id.h index 9c42642ab168..bcc58a8cccbc 100644 --- a/arch/arm/mach-ux500/include/mach/id.h +++ b/arch/arm/mach-ux500/id.h @@ -61,9 +61,14 @@ static inline bool __attribute_const__ cpu_is_u8540(void) return dbx500_partnumber() == 0x8540; } +static inline bool __attribute_const__ cpu_is_u8580(void) +{ + return dbx500_partnumber() == 0x8580; +} + static inline bool cpu_is_ux540_family(void) { - return cpu_is_u9540() || cpu_is_u8540(); + return cpu_is_u9540() || cpu_is_u8540() || cpu_is_u8580(); } /* @@ -115,6 +120,20 @@ static inline bool cpu_is_u8500v20_or_later(void) return (cpu_is_u8500() && !cpu_is_u8500v10() && !cpu_is_u8500v11()); } +/* + * 8540 revisions + */ + +static inline bool __attribute_const__ cpu_is_u8540v10(void) +{ + return cpu_is_u8540() && dbx500_revision() == 0xA0; +} + +static inline bool __attribute_const__ cpu_is_u8580v10(void) +{ + return cpu_is_u8580() && dbx500_revision() == 0xA0; +} + static inline bool ux500_is_svp(void) { return false; diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h index 28d16e744bfd..5201ddace503 100644 --- a/arch/arm/mach-ux500/include/mach/hardware.h +++ b/arch/arm/mach-ux500/include/mach/hardware.h @@ -39,7 +39,6 @@ #ifndef __ASSEMBLY__ -#include <mach/id.h> extern void __iomem *_PRCMU_BASE; #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index b8adac93421f..18f7af339dc9 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -21,9 +21,12 @@ #include <asm/cacheflush.h> #include <asm/smp_plat.h> #include <asm/smp_scu.h> + #include <mach/hardware.h> #include <mach/setup.h> +#include "id.h" + /* This is called from headsmp.S to wakeup the secondary core */ extern void u8500_secondary_startup(void); diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c index aa2a78acb59e..a6af0b8732ba 100644 --- a/arch/arm/mach-ux500/timer.c +++ b/arch/arm/mach-ux500/timer.c @@ -17,6 +17,8 @@ #include <mach/hardware.h> #include <mach/irqs.h> +#include "id.h" + #ifdef CONFIG_HAVE_ARM_TWD static DEFINE_TWD_LOCAL_TIMER(u8500_twd_local_timer, U8500_TWD_BASE, IRQ_LOCALTIMER); diff --git a/drivers/cpufreq/db8500-cpufreq.c b/drivers/cpufreq/db8500-cpufreq.c index 4f154bc0ebe4..523c9403bfce 100644 --- a/drivers/cpufreq/db8500-cpufreq.c +++ b/drivers/cpufreq/db8500-cpufreq.c @@ -167,9 +167,6 @@ static struct platform_driver db8500_cpufreq_plat_driver = { static int __init db8500_cpufreq_register(void) { - if (!cpu_is_u8500_family()) - return -ENODEV; - pr_info("cpufreq for DB8500 started\n"); return platform_driver_register(&db8500_cpufreq_plat_driver); } diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 13f4ccf2612d..d9fedd4d9194 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -36,7 +36,6 @@ #include <mach/hardware.h> #include <mach/irqs.h> #include <mach/db8500-regs.h> -#include <mach/id.h> #include "dbx500-prcmu-regs.h" /* Offset for the firmware version within the TCPM */ @@ -216,10 +215,8 @@ #define PRCM_REQ_MB5_I2C_HW_BITS (PRCM_REQ_MB5 + 0x1) #define PRCM_REQ_MB5_I2C_REG (PRCM_REQ_MB5 + 0x2) #define PRCM_REQ_MB5_I2C_VAL (PRCM_REQ_MB5 + 0x3) -#define PRCMU_I2C_WRITE(slave) \ - (((slave) << 1) | (cpu_is_u8500v2() ? BIT(6) : 0)) -#define PRCMU_I2C_READ(slave) \ - (((slave) << 1) | BIT(0) | (cpu_is_u8500v2() ? BIT(6) : 0)) +#define PRCMU_I2C_WRITE(slave) (((slave) << 1) | BIT(6)) +#define PRCMU_I2C_READ(slave) (((slave) << 1) | BIT(0) | BIT(6)) #define PRCMU_I2C_STOP_EN BIT(3) /* Mailbox 5 ACKs */ @@ -1049,12 +1046,13 @@ int db8500_prcmu_get_ddr_opp(void) * * This function sets the operating point of the DDR. */ +static bool enable_set_ddr_opp; int db8500_prcmu_set_ddr_opp(u8 opp) { if (opp < DDR_100_OPP || opp > DDR_25_OPP) return -EINVAL; /* Changing the DDR OPP can hang the hardware pre-v21 */ - if (cpu_is_u8500v20_or_later() && !cpu_is_u8500v20()) + if (enable_set_ddr_opp) writeb(opp, PRCM_DDR_SUBSYS_APE_MINBW); return 0; @@ -2790,6 +2788,7 @@ void __init db8500_prcmu_early_init(void) pr_err("prcmu: Unsupported chip version\n"); BUG(); } + tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE); spin_lock_init(&mb0_transfer.lock); spin_lock_init(&mb0_transfer.dbb_irqs_lock); @@ -3104,9 +3103,6 @@ static int db8500_prcmu_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; int irq = 0, err = 0, i; - if (ux500_is_svp()) - return -ENODEV; - init_prcm_registers(); /* Clean up the mailbox interrupts after pre-kernel code. */ @@ -3135,8 +3131,7 @@ static int db8500_prcmu_probe(struct platform_device *pdev) } } - if (cpu_is_u8500v20_or_later()) - prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET); + prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET); db8500_prcmu_update_cpufreq(); diff --git a/include/linux/mfd/db8500-prcmu.h b/include/linux/mfd/db8500-prcmu.h index 6ee4247df11e..a65deddede2f 100644 --- a/include/linux/mfd/db8500-prcmu.h +++ b/include/linux/mfd/db8500-prcmu.h @@ -16,12 +16,6 @@ /* * Registers */ -#define DB8500_PRCM_GPIOCR 0x138 -#define DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0 BIT(0) -#define DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD BIT(9) -#define DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 BIT(11) -#define DB8500_PRCM_GPIOCR_SPI2_SELECT BIT(23) - #define DB8500_PRCM_LINE_VALUE 0x170 #define DB8500_PRCM_LINE_VALUE_HSI_CAWAKE0 BIT(3) diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index c202d6c4d879..155280642583 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -218,8 +218,6 @@ enum ddr_pwrst { #if defined(CONFIG_UX500_SOC_DB8500) -#include <mach/id.h> - static inline void __init prcmu_early_init(void) { return db8500_prcmu_early_init(); @@ -626,85 +624,6 @@ static inline void prcmu_clear(unsigned int reg, u32 bits) prcmu_write_masked(reg, bits, 0); } -#if defined(CONFIG_UX500_SOC_DB8500) - -/** - * prcmu_enable_spi2 - Enables pin muxing for SPI2 on OtherAlternateC1. - */ -static inline void prcmu_enable_spi2(void) -{ - if (cpu_is_u8500()) - prcmu_set(DB8500_PRCM_GPIOCR, DB8500_PRCM_GPIOCR_SPI2_SELECT); -} - -/** - * prcmu_disable_spi2 - Disables pin muxing for SPI2 on OtherAlternateC1. - */ -static inline void prcmu_disable_spi2(void) -{ - if (cpu_is_u8500()) - prcmu_clear(DB8500_PRCM_GPIOCR, DB8500_PRCM_GPIOCR_SPI2_SELECT); -} - -/** - * prcmu_enable_stm_mod_uart - Enables pin muxing for STMMOD - * and UARTMOD on OtherAlternateC3. - */ -static inline void prcmu_enable_stm_mod_uart(void) -{ - if (cpu_is_u8500()) { - prcmu_set(DB8500_PRCM_GPIOCR, - (DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 | - DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0)); - } -} - -/** - * prcmu_disable_stm_mod_uart - Disables pin muxing for STMMOD - * and UARTMOD on OtherAlternateC3. - */ -static inline void prcmu_disable_stm_mod_uart(void) -{ - if (cpu_is_u8500()) { - prcmu_clear(DB8500_PRCM_GPIOCR, - (DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 | - DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0)); - } -} - -/** - * prcmu_enable_stm_ape - Enables pin muxing for STM APE on OtherAlternateC1. - */ -static inline void prcmu_enable_stm_ape(void) -{ - if (cpu_is_u8500()) { - prcmu_set(DB8500_PRCM_GPIOCR, - DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD); - } -} - -/** - * prcmu_disable_stm_ape - Disables pin muxing for STM APE on OtherAlternateC1. - */ -static inline void prcmu_disable_stm_ape(void) -{ - if (cpu_is_u8500()) { - prcmu_clear(DB8500_PRCM_GPIOCR, - DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD); - } -} - -#else - -static inline void prcmu_enable_spi2(void) {} -static inline void prcmu_disable_spi2(void) {} -static inline void prcmu_enable_stm_mod_uart(void) {} -static inline void prcmu_disable_stm_mod_uart(void) {} -static inline void prcmu_enable_stm_ape(void) {} -static inline void prcmu_disable_stm_ape(void) {} - -#endif - /* PRCMU QoS APE OPP class */ #define PRCMU_QOS_APE_OPP 1 #define PRCMU_QOS_DDR_OPP 2 |