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authorCorentin LABBE <clabbe.montjoie@gmail.com>2016-08-26 13:11:35 +0200
committerHerbert Xu <herbert@gondor.apana.org.au>2016-08-31 23:00:46 +0800
commit3c343a37644c5fe07960c3226a463d98627607f0 (patch)
tree7b7d01b99031bf666a4e7c5be7eae2ef9df2bea6
parent7bad2cc062b343575f19d5de6be3f297a1429f37 (diff)
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hwrng: amd - Access hardware via ioread32/iowrite32
Instead of accessing hw directly via pmbase, it's better to access after ioport_map() via ioread32/iowrite32. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r--drivers/char/hw_random/amd-rng.c31
1 files changed, 25 insertions, 6 deletions
diff --git a/drivers/char/hw_random/amd-rng.c b/drivers/char/hw_random/amd-rng.c
index 4ef94e9b9fe7..bfa14b9a3a30 100644
--- a/drivers/char/hw_random/amd-rng.c
+++ b/drivers/char/hw_random/amd-rng.c
@@ -32,6 +32,11 @@
#define DRV_NAME "AMD768-HWRNG"
+#define RNGDATA 0x00
+#define RNGDONE 0x04
+#define PMBASE_OFFSET 0xF0
+#define PMBASE_SIZE 8
+
/*
* Data for PCI driver interface
*
@@ -48,6 +53,7 @@ static const struct pci_device_id pci_tbl[] = {
MODULE_DEVICE_TABLE(pci, pci_tbl);
struct amd768_priv {
+ void __iomem *iobase;
struct pci_dev *pcidev;
u32 pmbase;
};
@@ -58,7 +64,7 @@ static int amd_rng_data_present(struct hwrng *rng, int wait)
int data, i;
for (i = 0; i < 20; i++) {
- data = !!(inl(priv->pmbase + 0xF4) & 1);
+ data = !!(ioread32(priv->iobase + RNGDONE) & 1);
if (data || !wait)
break;
udelay(10);
@@ -70,7 +76,7 @@ static int amd_rng_data_read(struct hwrng *rng, u32 *data)
{
struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
- *data = inl(priv->pmbase + 0xF0);
+ *data = ioread32(priv->iobase + RNGDATA);
return 4;
}
@@ -138,12 +144,20 @@ found:
if (!priv)
return -ENOMEM;
- if (!request_region(pmbase + 0xF0, 8, DRV_NAME)) {
+ if (!request_region(pmbase + PMBASE_OFFSET, PMBASE_SIZE, DRV_NAME)) {
dev_err(&pdev->dev, DRV_NAME " region 0x%x already in use!\n",
pmbase + 0xF0);
err = -EBUSY;
goto out;
}
+
+ priv->iobase = ioport_map(pmbase + PMBASE_OFFSET, PMBASE_SIZE);
+ if (!priv->iobase) {
+ pr_err(DRV_NAME "Cannot map ioport\n");
+ err = -EINVAL;
+ goto err_iomap;
+ }
+
amd_rng.priv = (unsigned long)priv;
priv->pmbase = pmbase;
priv->pcidev = pdev;
@@ -152,11 +166,14 @@ found:
err = hwrng_register(&amd_rng);
if (err) {
pr_err(DRV_NAME " registering failed (%d)\n", err);
- release_region(pmbase + 0xF0, 8);
- goto out;
+ goto err_hwrng;
}
return 0;
+err_hwrng:
+ ioport_unmap(priv->iobase);
+err_iomap:
+ release_region(pmbase + PMBASE_OFFSET, PMBASE_SIZE);
out:
kfree(priv);
return err;
@@ -170,7 +187,9 @@ static void __exit mod_exit(void)
hwrng_unregister(&amd_rng);
- release_region(priv->pmbase + 0xF0, 8);
+ ioport_unmap(priv->iobase);
+
+ release_region(priv->pmbase + PMBASE_OFFSET, PMBASE_SIZE);
kfree(priv);
}