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authorRodrigo Vivi <rodrigo.vivi@intel.com>2015-11-11 11:37:08 -0800
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-11-18 16:01:39 +0100
commit20bb97fe0ecc02f25666fc26f0ac79a6f1515a2b (patch)
tree539d9ae7591af522eb247cf22c72fe2270d03da4
parentd0ac896a477d8c689fecf9b249c21e1bdd0b9851 (diff)
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drm/i915: Reduce PSR re-activation time for VLV/CHV.
With 'commit 30886c5a ("drm/i915: VLV/CHV PSR: Increase wait delay time before active PSR.")' we fixed a blank screen when first activation was happening immediately after PSR being enabled. There we gave more time for idleness by increasing the delay between re-activating sequences. However, commit "drm/i915: Delay first PSR activation." delay the first activation in a better way keeping a good PSR residency. So, we can now reduce the delay on re-enable. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Durgadoss R <durgadoss.r@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_psr.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 5f44c28221bb..715a48b95dc5 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -729,7 +729,6 @@ void intel_psr_flush(struct drm_device *dev,
struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_crtc *crtc;
enum pipe pipe;
- int delay_ms = HAS_DDI(dev) ? 100 : 500;
mutex_lock(&dev_priv->psr.lock);
if (!dev_priv->psr.enabled) {
@@ -766,7 +765,7 @@ void intel_psr_flush(struct drm_device *dev,
if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits)
if (!work_busy(&dev_priv->psr.work.work))
schedule_delayed_work(&dev_priv->psr.work,
- msecs_to_jiffies(delay_ms));
+ msecs_to_jiffies(100));
mutex_unlock(&dev_priv->psr.lock);
}