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| author | Thierry Reding <treding@nvidia.com> | 2019-06-13 18:12:25 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2019-06-25 16:12:55 -0700 |
| commit | e3527dca15c853daaacddc3f95461e8a02190114 (patch) | |
| tree | e637db7e3476ed68644df2f8eb2df73496c2efdd | |
| parent | c1139d20833f8882df608f456ce65b06cd1caa98 (diff) | |
| download | linux-e3527dca15c853daaacddc3f95461e8a02190114.tar.gz linux-e3527dca15c853daaacddc3f95461e8a02190114.tar.bz2 linux-e3527dca15c853daaacddc3f95461e8a02190114.zip | |
clk: tegra: Do not enable PLL_RE_VCO on Tegra210
It turns out that this PLL is not used on Tegra210, so there's no need
to enable it via the init table. Remove the init table entry for this
PLL to avoid it getting enabled at boot time. If the bootloader enabled
it and forgot to turn it off, the common clock framework will now know
to disable it because it is unused.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| -rw-r--r-- | drivers/clk/tegra/clk-tegra210.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c index 18384666b380..b474d3d7b1b6 100644 --- a/drivers/clk/tegra/clk-tegra210.c +++ b/drivers/clk/tegra/clk-tegra210.c @@ -3348,7 +3348,6 @@ static struct tegra_clk_init_table init_table[] __initdata = { { TEGRA210_CLK_DFLL_SOC, TEGRA210_CLK_PLL_P, 51000000, 1 }, { TEGRA210_CLK_DFLL_REF, TEGRA210_CLK_PLL_P, 51000000, 1 }, { TEGRA210_CLK_SBC4, TEGRA210_CLK_PLL_P, 12000000, 1 }, - { TEGRA210_CLK_PLL_RE_VCO, TEGRA210_CLK_CLK_MAX, 672000000, 1 }, { TEGRA210_CLK_PLL_U_OUT1, TEGRA210_CLK_CLK_MAX, 48000000, 1 }, { TEGRA210_CLK_XUSB_GATE, TEGRA210_CLK_CLK_MAX, 0, 1 }, { TEGRA210_CLK_XUSB_SS_SRC, TEGRA210_CLK_PLL_U_480M, 120000000, 0 }, |