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authorAlan Cox <alan@lxorguk.ukuu.org.uk>2007-04-26 00:19:25 -0700
committerJeff Garzik <jeff@garzik.org>2007-04-28 15:16:39 -0400
commita473446856374668c4296db5256ca708ce8f7095 (patch)
tree5734c4fd98968b4c236a2af0a8b1891d9f52f0bd
parent28e21c8c0d44cd63bad4c62f94ef0c5a1cb8402c (diff)
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pata_hpt37x: Further small fixes
Further HPT37x changes - No 66MHz 370/370A - Remove dead special case check now we use the DPLL (as per the IDE driver) Pointed out by Sergei Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
-rw-r--r--drivers/ata/pata_hpt37x.c23
1 files changed, 9 insertions, 14 deletions
diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c
index fe1b482d5291..41d831296347 100644
--- a/drivers/ata/pata_hpt37x.c
+++ b/drivers/ata/pata_hpt37x.c
@@ -26,7 +26,7 @@
#include <linux/libata.h>
#define DRV_NAME "pata_hpt37x"
-#define DRV_VERSION "0.6.4"
+#define DRV_VERSION "0.6.5"
struct hpt_clock {
u8 xfer_speed;
@@ -130,7 +130,7 @@ static const struct hpt_chip hpt370 = {
hpt37x_timings_33,
NULL,
NULL,
- hpt37x_timings_66
+ NULL
}
};
@@ -141,7 +141,7 @@ static const struct hpt_chip hpt370a = {
hpt37x_timings_33,
NULL,
hpt37x_timings_50,
- hpt37x_timings_66
+ NULL
}
};
@@ -1018,8 +1018,8 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
return -ENODEV;
port = &info_hpt372;
chip_table = &hpt371;
- /* Single channel device, paster is not present
- but the NIOS (or us for non x86) must mark it
+ /* Single channel device, master is not present
+ but the BIOS (or us for non x86) must mark it
absent */
pci_read_config_byte(dev, 0x50, &mcr1);
mcr1 &= ~0x04;
@@ -1131,16 +1131,11 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
} else {
port->private_data = (void *)chip_table->clocks[clock_slot];
/*
- * Perform a final fixup. The 371 and 372 clock determines
- * if UDMA133 is available. (FIXME: should we use DPLL then ?)
- */
+ * Perform a final fixup. Note that we will have used the
+ * DPLL on the HPT372 which means we don't have to worry
+ * about lack of UDMA133 support on lower clocks
+ */
- if (clock_slot == 2 && chip_table == &hpt372) { /* 50Mhz */
- printk(KERN_WARNING "pata_hpt37x: No UDMA133 support available with 50MHz bus clock.\n");
- if (port == &info_hpt372)
- port = &info_hpt372_50;
- else BUG();
- }
if (clock_slot < 2 && port == &info_hpt370)
port = &info_hpt370_33;
if (clock_slot < 2 && port == &info_hpt370a)