diff options
| author | Conor Dooley <conor.dooley@microchip.com> | 2022-09-27 12:19:19 +0100 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2022-09-27 18:53:58 +0100 |
| commit | ab291621a8b85269496ae9a964b6d49cd1e030c8 (patch) | |
| tree | 0335955f3f1dbdaa65a408b383db0428551ce515 | |
| parent | 6fc655ed4986f88b91e3f7b339222fc1c4ffba08 (diff) | |
| download | linux-ab291621a8b85269496ae9a964b6d49cd1e030c8.tar.gz linux-ab291621a8b85269496ae9a964b6d49cd1e030c8.tar.bz2 linux-ab291621a8b85269496ae9a964b6d49cd1e030c8.zip | |
riscv: dts: microchip: icicle: re-jig fabric peripheral addresses
When users try to add onto the reference design, they find that the
current addresses that peripherals connected to Fabric InterConnect
(FIC) 3 use are restrictive. For the v2022.09 reference design, the
peripherals have been shifted down, leaving more contiguous address
space for their custom IP/peripherals.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
| -rw-r--r-- | arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi index 9ca2ac4ad8e2..35030ea330ee 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi @@ -5,18 +5,18 @@ compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit", "microchip,mpfs"; - core_pwm0: pwm@41000000 { + core_pwm0: pwm@40000000 { compatible = "microchip,corepwm-rtl-v4"; - reg = <0x0 0x41000000 0x0 0xF0>; + reg = <0x0 0x40000000 0x0 0xF0>; microchip,sync-update-mask = /bits/ 32 <0>; #pwm-cells = <2>; clocks = <&fabric_clk3>; status = "disabled"; }; - i2c2: i2c@44000000 { + i2c2: i2c@40000200 { compatible = "microchip,corei2c-rtl-v7"; - reg = <0x0 0x44000000 0x0 0x1000>; + reg = <0x0 0x40000200 0x0 0x1000>; #address-cells = <1>; #size-cells = <0>; clocks = <&fabric_clk3>; |