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authorAlexandre Belloni <alexandre.belloni@free-electrons.com>2014-03-03 18:07:00 +0000
committerJonathan Cameron <jic23@kernel.org>2014-03-15 16:32:44 +0000
commit8f32b6ba56ef8c8434635b9f08ff6a23510960a5 (patch)
tree78c32af0f5b53021173824512be68f77fd6ebb9d
parent301841a634976c1cef4490cae577ffd0f26d0149 (diff)
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iio: adc: at91_adc: correct default shtim value
When sample_hold_time is zero (this is the case when DT is not used or if atmel,adc-sample-hold-time is omitted), then the calculated shtim is large. Make that 0, which is the default for that register and the ADC will then use a sane value of 2/ADCCLK or 1/ADCCLK depending on the version. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
-rw-r--r--drivers/iio/adc/at91_adc.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c
index bbba014c9939..89777ed9abd8 100644
--- a/drivers/iio/adc/at91_adc.c
+++ b/drivers/iio/adc/at91_adc.c
@@ -1007,8 +1007,11 @@ static int at91_adc_probe(struct platform_device *pdev)
* the best converted final value between two channels selection
* The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock
*/
- shtim = round_up((st->sample_hold_time * adc_clk_khz /
- 1000) - 1, 1);
+ if (st->sample_hold_time > 0)
+ shtim = round_up((st->sample_hold_time * adc_clk_khz / 1000)
+ - 1, 1);
+ else
+ shtim = 0;
reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask;
reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask;