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author | Rajan Vaja <rajan.vaja@xilinx.com> | 2020-04-24 13:57:47 -0700 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-04-28 15:45:07 +0200 |
commit | f5ccd54b67b3f029de9d3818efa70f210d189019 (patch) | |
tree | 21180912cccb59d9cc32e549b9554430c94e2e10 | |
parent | 3637e84cd2e910f84835fac9650316dce53218ef (diff) | |
download | linux-f5ccd54b67b3f029de9d3818efa70f210d189019.tar.gz linux-f5ccd54b67b3f029de9d3818efa70f210d189019.tar.bz2 linux-f5ccd54b67b3f029de9d3818efa70f210d189019.zip |
firmware: xilinx: Remove eemi ops for clock_disable
Use direct function call for clock_disable instead using of eemi ops.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Link: https://lore.kernel.org/r/1587761887-4279-6-git-send-email-jolly.shah@xilinx.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | drivers/clk/zynqmp/clk-gate-zynqmp.c | 4 | ||||
-rw-r--r-- | drivers/clk/zynqmp/pll.c | 3 | ||||
-rw-r--r-- | drivers/firmware/xilinx/zynqmp.c | 4 | ||||
-rw-r--r-- | include/linux/firmware/xlnx-zynqmp.h | 6 |
4 files changed, 9 insertions, 8 deletions
diff --git a/drivers/clk/zynqmp/clk-gate-zynqmp.c b/drivers/clk/zynqmp/clk-gate-zynqmp.c index 437b921f33b7..11f1b9718c3d 100644 --- a/drivers/clk/zynqmp/clk-gate-zynqmp.c +++ b/drivers/clk/zynqmp/clk-gate-zynqmp.c @@ -37,7 +37,6 @@ static int zynqmp_clk_gate_enable(struct clk_hw *hw) const char *clk_name = clk_hw_get_name(hw); u32 clk_id = gate->clk_id; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); ret = zynqmp_pm_clock_enable(clk_id); @@ -58,9 +57,8 @@ static void zynqmp_clk_gate_disable(struct clk_hw *hw) const char *clk_name = clk_hw_get_name(hw); u32 clk_id = gate->clk_id; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->clock_disable(clk_id); + ret = zynqmp_pm_clock_disable(clk_id); if (ret) pr_warn_once("%s() clock disable failed for %s, ret = %d\n", diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c index 153aa6720619..38b8dbc693f4 100644 --- a/drivers/clk/zynqmp/pll.c +++ b/drivers/clk/zynqmp/pll.c @@ -268,12 +268,11 @@ static void zynqmp_pll_disable(struct clk_hw *hw) const char *clk_name = clk_hw_get_name(hw); u32 clk_id = clk->clk_id; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); if (!zynqmp_pll_is_enabled(hw)) return; - ret = eemi_ops->clock_disable(clk_id); + ret = zynqmp_pm_clock_disable(clk_id); if (ret) pr_warn_once("%s() clock disable failed for %s, ret = %d\n", __func__, clk_name, ret); diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index da13627c1ca1..d884805b7d6b 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -366,10 +366,11 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_disable(u32 clock_id) +int zynqmp_pm_clock_disable(u32 clock_id) { return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable); /** * zynqmp_pm_clock_getstate() - Get the clock state for given id @@ -738,7 +739,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .clock_disable = zynqmp_pm_clock_disable, .clock_getstate = zynqmp_pm_clock_getstate, .clock_setdivider = zynqmp_pm_clock_setdivider, .clock_getdivider = zynqmp_pm_clock_getdivider, diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 77365d1d246c..f9a84d974b5c 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*clock_disable)(u32 clock_id); int (*clock_getstate)(u32 clock_id, u32 *state); int (*clock_setdivider)(u32 clock_id, u32 divider); int (*clock_getdivider)(u32 clock_id, u32 *divider); @@ -331,6 +330,7 @@ int zynqmp_pm_get_api_version(u32 *version); int zynqmp_pm_get_chipid(u32 *idcode, u32 *version); int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out); int zynqmp_pm_clock_enable(u32 clock_id); +int zynqmp_pm_clock_disable(u32 clock_id); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -353,6 +353,10 @@ static inline int zynqmp_pm_clock_enable(u32 clock_id) { return -ENODEV; } +static inline int zynqmp_pm_clock_disable(u32 clock_id) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ |