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authorEric Dumazet <dada1@cosmosbay.com>2005-09-06 15:16:17 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2005-09-07 16:57:15 -0700
commit19aaabb5841439988fc357f90d5c59d28fa84658 (patch)
tree928d0b695a7c27a61ef7b93549a50014374bf4fe
parentc078d3266e58a3edd698b9f143f78fc585679031 (diff)
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[PATCH] x86_64: prefetchw() can fall back to prefetch() if !3DNOW
This is a multi-part message in MIME format. If the cpu lacks 3DNOW feature, we can use a normal prefetcht0 instruction instead of NOP5. "prefetchw (%rxx)" and "prefetcht0 (%rxx)" have the same length, ranging from 3 to 5 bytes depending on the register. So this patch even helps AMD64, shortening the length of the code. Signed-off-by: Eric Dumazet <dada1@cosmosbay.com> Acked-by: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--include/asm-x86_64/processor.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h
index 194160f6a43f..a8321999448f 100644
--- a/include/asm-x86_64/processor.h
+++ b/include/asm-x86_64/processor.h
@@ -398,7 +398,7 @@ static inline void prefetch(void *x)
#define ARCH_HAS_PREFETCHW 1
static inline void prefetchw(void *x)
{
- alternative_input(ASM_NOP5,
+ alternative_input("prefetcht0 (%1)",
"prefetchw (%1)",
X86_FEATURE_3DNOW,
"r" (x));