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| author | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2020-10-30 08:40:39 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-10-30 13:07:01 +0100 |
| commit | 34433332841de2787f903fcf7de8dc3e06780f4a (patch) | |
| tree | 77f3ceec7fbb1a5d8def1fc501233ee0bbd9b950 /Documentation/ABI/testing/sysfs-platform-eeepc-laptop | |
| parent | 98913408c5465ac477f80da7affe347b413edaa4 (diff) | |
| download | linux-34433332841de2787f903fcf7de8dc3e06780f4a.tar.gz linux-34433332841de2787f903fcf7de8dc3e06780f4a.tar.bz2 linux-34433332841de2787f903fcf7de8dc3e06780f4a.zip | |
docs: ABI: testing: make the files compatible with ReST output
Some files over there won't parse well by Sphinx.
Fix them.
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # for IIO
Acked-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/58cf3c2d611e0197fb215652719ebd82ca2658db.1604042072.git.mchehab+huawei@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/ABI/testing/sysfs-platform-eeepc-laptop')
| -rw-r--r-- | Documentation/ABI/testing/sysfs-platform-eeepc-laptop | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/Documentation/ABI/testing/sysfs-platform-eeepc-laptop b/Documentation/ABI/testing/sysfs-platform-eeepc-laptop index 5b026c69587a..70dbe0733cf6 100644 --- a/Documentation/ABI/testing/sysfs-platform-eeepc-laptop +++ b/Documentation/ABI/testing/sysfs-platform-eeepc-laptop @@ -4,9 +4,11 @@ KernelVersion: 2.6.26 Contact: "Corentin Chary" <corentincj@iksaif.net> Description: This file allows display switching. + - 1 = LCD - 2 = CRT - 3 = LCD+CRT + If you run X11, you should use xrandr instead. What: /sys/devices/platform/eeepc/camera @@ -30,16 +32,20 @@ Contact: "Corentin Chary" <corentincj@iksaif.net> Description: Change CPU clock configuration. On the Eee PC 1000H there are three available clock configuration: + * 0 -> Super Performance Mode * 1 -> High Performance Mode * 2 -> Power Saving Mode + On Eee PC 701 there is only 2 available clock configurations. Available configuration are listed in available_cpufv file. Reading this file will show the raw hexadecimal value which - is defined as follow: - | 8 bit | 8 bit | - | `---- Current mode - `------------ Availables modes + is defined as follow:: + + | 8 bit | 8 bit | + | `---- Current mode + `------------ Availables modes + For example, 0x301 means: mode 1 selected, 3 available modes. What: /sys/devices/platform/eeepc/available_cpufv |