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| author | Hiroshi DOYU <hdoyu@nvidia.com> | 2012-05-10 10:42:30 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-05-10 14:43:53 -0700 |
| commit | c542fb79fba4c63aa6e2a27f90373b0516614eca (patch) | |
| tree | 19847b29ef6202717dfc8132a575b04214efdbd0 /Documentation/devicetree/bindings/arm/tegra | |
| parent | 649e6ee33f73ba1c4f2492c6de9aff2254b540cb (diff) | |
| download | linux-c542fb79fba4c63aa6e2a27f90373b0516614eca.tar.gz linux-c542fb79fba4c63aa6e2a27f90373b0516614eca.tar.bz2 linux-c542fb79fba4c63aa6e2a27f90373b0516614eca.zip | |
ARM: tegra20: Add Tegra Memory Controller(MC) driver
Tegra Memory Controller(MC) driver for Tegra20
Added to support MC General interrupts, mainly for IOMMU(GART).
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/tegra')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt new file mode 100644 index 000000000000..c25a0a55151d --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt @@ -0,0 +1,16 @@ +NVIDIA Tegra20 MC(Memory Controller) + +Required properties: +- compatible : "nvidia,tegra20-mc" +- reg : Should contain 2 register ranges(address and length); see the + example below. Note that the MC registers are interleaved with the + GART registers, and hence must be represented as multiple ranges. +- interrupts : Should contain MC General interrupt. + +Example: + mc { + compatible = "nvidia,tegra20-mc"; + reg = <0x7000f000 0x024 + 0x7000f03c 0x3c4>; + interrupts = <0 77 0x04>; + }; |