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author | Thomas Gleixner <tglx@linutronix.de> | 2013-05-05 08:24:42 +0200 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2013-05-05 08:27:03 +0200 |
commit | f99e44a7f3352d7131c7526207f153f13ec5acd4 (patch) | |
tree | 0f448b21128c478053ee7f7765b865954c4eebe8 /Documentation/devicetree/bindings/clock/altr_socfpga.txt | |
parent | fd29f424d458118f02e89596505c68a63dcb3007 (diff) | |
parent | ce857229e0c3adc211944a13a5579ef84fd7b4af (diff) | |
download | linux-f99e44a7f3352d7131c7526207f153f13ec5acd4.tar.gz linux-f99e44a7f3352d7131c7526207f153f13ec5acd4.tar.bz2 linux-f99e44a7f3352d7131c7526207f153f13ec5acd4.zip |
Merge branch 'linus' into core/urgent
Update with Linus tree so fixes for the same can be applied.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/altr_socfpga.txt')
-rw-r--r-- | Documentation/devicetree/bindings/clock/altr_socfpga.txt | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/altr_socfpga.txt b/Documentation/devicetree/bindings/clock/altr_socfpga.txt new file mode 100644 index 000000000000..bd0c8416a5c8 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/altr_socfpga.txt @@ -0,0 +1,18 @@ +Device Tree Clock bindings for Altera's SoCFPGA platform + +This binding uses the common clock binding[1]. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt + +Required properties: +- compatible : shall be one of the following: + "altr,socfpga-pll-clock" - for a PLL clock + "altr,socfpga-perip-clock" - The peripheral clock divided from the + PLL clock. +- reg : shall be the control register offset from CLOCK_MANAGER's base for the clock. +- clocks : shall be the input parent clock phandle for the clock. This is + either an oscillator or a pll output. +- #clock-cells : from common clock binding, shall be set to 0. + +Optional properties: +- fixed-divider : If clocks have a fixed divider value, use this property. |