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authorReinder de Haan <patchesrdh@mveas.com>2015-11-15 20:46:13 +0100
committerMaxime Ripard <maxime.ripard@free-electrons.com>2015-11-20 13:50:19 +0100
commit7bec0200ac214b5cba44e2c2c4385815be4b9f00 (patch)
treec089a7e37a59f3b9b567471721d7f0c1f4ce832b /Documentation/devicetree/bindings/clock
parent8005c49d9aea74d382f474ce11afbbc7d7130bec (diff)
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clk: sunxi: Add support for the H3 usb phy clocks
The H3 has a usb-phy clk register which is similar to that of earlier SoCs, but with support for a larger number of phys. So we can simply add a new set of clk-data and a new compatible and be done with it. Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Reinder de Haan <patchesrdh@mveas.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r--Documentation/devicetree/bindings/clock/sunxi.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
index 8a47b77abfca..a94bb56a0e9e 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -68,6 +68,7 @@ Required properties:
"allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
"allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31
"allwinner,sun8i-a23-usb-clk" - for usb gates + resets on A23
+ "allwinner,sun8i-h3-usb-clk" - for usb gates + resets on H3
"allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80
"allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80