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| author | Ming-Fan Chen <ming-fan.chen@mediatek.com> | 2020-01-08 14:41:29 +0800 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2020-07-13 15:28:56 +0200 |
| commit | d724794b4534105e4169f8c9641235541bc7b74f (patch) | |
| tree | b456a63162a63e7e7911b189ea39d89ed9fbc38a /Documentation/devicetree/bindings | |
| parent | 397e18b4bb2d27389361ceaf154a7acced648a72 (diff) | |
| download | linux-d724794b4534105e4169f8c9641235541bc7b74f.tar.gz linux-d724794b4534105e4169f8c9641235541bc7b74f.tar.bz2 linux-d724794b4534105e4169f8c9641235541bc7b74f.zip | |
dt-bindings: mediatek: Add binding for MT6779 SMI
This patch add description for MT6779 SMI.
There are GALS in smi-larb but without clock of GALS alone.
changelog since v2:
Add GALS for mt6779 in smi-common.txt
Signed-off-by: Ming-Fan Chen <ming-fan.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1578465691-30692-3-git-send-email-ming-fan.chen@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'Documentation/devicetree/bindings')
| -rw-r--r-- | Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt | 5 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt | 3 |
2 files changed, 5 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt index b478ade4da65..b64573680b42 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt @@ -5,7 +5,7 @@ The hardware block diagram please check bindings/iommu/mediatek,iommu.txt Mediatek SMI have two generations of HW architecture, here is the list which generation the SoCs use: generation 1: mt2701 and mt7623. -generation 2: mt2712, mt8173 and mt8183. +generation 2: mt2712, mt6779, mt8173 and mt8183. There's slight differences between the two SMI, for generation 2, the register which control the iommu port is at each larb's register base. But @@ -18,6 +18,7 @@ Required properties: - compatible : must be one of : "mediatek,mt2701-smi-common" "mediatek,mt2712-smi-common" + "mediatek,mt6779-smi-common" "mediatek,mt7623-smi-common", "mediatek,mt2701-smi-common" "mediatek,mt8173-smi-common" "mediatek,mt8183-smi-common" @@ -35,7 +36,7 @@ Required properties: and these 2 option clocks for generation 2 smi HW: - "gals0": the path0 clock of GALS(Global Async Local Sync). - "gals1": the path1 clock of GALS(Global Async Local Sync). - Here is the list which has this GALS: mt8183. + Here is the list which has this GALS: mt6779 and mt8183. Example: smi_common: smi@14022000 { diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt index 4b369b3e1a69..8f19dfe7d80e 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt @@ -6,6 +6,7 @@ Required properties: - compatible : must be one of : "mediatek,mt2701-smi-larb" "mediatek,mt2712-smi-larb" + "mediatek,mt6779-smi-larb" "mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb" "mediatek,mt8173-smi-larb" "mediatek,mt8183-smi-larb" @@ -21,7 +22,7 @@ Required properties: - "gals": the clock for GALS(Global Async Local Sync). Here is the list which has this GALS: mt8183. -Required property for mt2701, mt2712 and mt7623: +Required property for mt2701, mt2712, mt6779 and mt7623: - mediatek,larb-id :the hardware id of this larb. Example: |