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| author | Peter Korsgaard <jacmet@sunsite.dk> | 2008-09-23 17:35:38 +0200 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2008-09-23 10:41:16 -0500 |
| commit | 1e16dfc1baa745dd89b95f6e33e4142df6218066 (patch) | |
| tree | eabec7954c03bde518f32f40fe3c544803b74497 /Documentation/powerpc | |
| parent | 1afb7f809bfb8fad9eec9419f3dfd75cee746ebd (diff) | |
| download | linux-1e16dfc1baa745dd89b95f6e33e4142df6218066.tar.gz linux-1e16dfc1baa745dd89b95f6e33e4142df6218066.tar.bz2 linux-1e16dfc1baa745dd89b95f6e33e4142df6218066.zip | |
powerpc: gpio driver for mpc8349/8572/8610 and compatible
Structured similar to the existing QE GPIO support.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'Documentation/powerpc')
| -rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt new file mode 100644 index 000000000000..d015dcec4011 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt @@ -0,0 +1,40 @@ +GPIO controllers on MPC8xxx SoCs + +This is for the non-QE/CPM/GUTs GPIO controllers as found on +8349, 8572, 8610 and compatible. + +Every GPIO controller node must have #gpio-cells property defined, +this information will be used to translate gpio-specifiers. + +Required properties: +- compatible : "fsl,<CHIP>-gpio" followed by "fsl,mpc8349-gpio" for + 83xx, "fsl,mpc8572-gpio" for 85xx and "fsl,mpc8610-gpio" for 86xx. +- #gpio-cells : Should be two. The first cell is the pin number and the + second cell is used to specify optional parameters (currently unused). + - interrupts : Interrupt mapping for GPIO IRQ (currently unused). + - interrupt-parent : Phandle for the interrupt controller that + services interrupts for this device. +- gpio-controller : Marks the port as GPIO controller. + +Example of gpio-controller nodes for a MPC8347 SoC: + + gpio1: gpio-controller@c00 { + #gpio-cells = <2>; + compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio"; + reg = <0xc00 0x100>; + interrupts = <74 0x8>; + interrupt-parent = <&ipic>; + gpio-controller; + }; + + gpio2: gpio-controller@d00 { + #gpio-cells = <2>; + compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio"; + reg = <0xd00 0x100>; + interrupts = <75 0x8>; + interrupt-parent = <&ipic>; + gpio-controller; + }; + +See booting-without-of.txt for details of how to specify GPIO +information for devices. |