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| author | Mauro Carvalho Chehab <mchehab+samsung@kernel.org> | 2018-05-07 06:35:41 -0300 |
|---|---|---|
| committer | Jonathan Corbet <corbet@lwn.net> | 2018-05-08 10:02:34 -0600 |
| commit | de0f51e4b1391145e47d6aa60681dab091bcc777 (patch) | |
| tree | 03307fd645fcf3b2c9d45d8cb3711b4143891904 /Documentation/translations | |
| parent | fe8703cc0de67695e3385ba78b5dfb1091769d50 (diff) | |
| download | linux-de0f51e4b1391145e47d6aa60681dab091bcc777.tar.gz linux-de0f51e4b1391145e47d6aa60681dab091bcc777.tar.bz2 linux-de0f51e4b1391145e47d6aa60681dab091bcc777.zip | |
docs: core-api: add cachetlb documentation
The cachetlb.txt is already in ReST format. So, move it to the
core-api guide, where it belongs.
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Diffstat (limited to 'Documentation/translations')
| -rw-r--r-- | Documentation/translations/ko_KR/memory-barriers.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/translations/ko_KR/memory-barriers.txt b/Documentation/translations/ko_KR/memory-barriers.txt index 0a0930ab4156..081937577c1a 100644 --- a/Documentation/translations/ko_KR/memory-barriers.txt +++ b/Documentation/translations/ko_KR/memory-barriers.txt @@ -2846,7 +2846,7 @@ CPU 의 캐시에서 RAM 으로 쓰여지는 더티 캐시 라인에 의해 덮 문제를 해결하기 위해선, 커널의 적절한 부분에서 각 CPU 의 캐시 안의 문제가 되는 비트들을 무효화 시켜야 합니다. -캐시 관리에 대한 더 많은 정보를 위해선 Documentation/cachetlb.txt 를 +캐시 관리에 대한 더 많은 정보를 위해선 Documentation/core-api/cachetlb.rst 를 참고하세요. |