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| author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2014-04-04 14:31:41 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2014-04-08 12:56:45 +0100 |
| commit | 74ddd8c40d8ac747ec780be3da40b37641a9b396 (patch) | |
| tree | 5a9216aa5f5fe7f86bdecf0a56a9a2dbe05cccf1 /Documentation/xtensa | |
| parent | c159a85013afbb8283f0c7272812952e04d5c3a1 (diff) | |
| download | linux-74ddd8c40d8ac747ec780be3da40b37641a9b396.tar.gz linux-74ddd8c40d8ac747ec780be3da40b37641a9b396.tar.bz2 linux-74ddd8c40d8ac747ec780be3da40b37641a9b396.zip | |
ASoC: davinci-mcasp: Fix bit clock polarity settings
IB_NF, NB_IF and IB_IF configured the bc polarity incorrectly. The receive
polarity was set to the same edge as the TX in these cases.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'Documentation/xtensa')
0 files changed, 0 insertions, 0 deletions