summaryrefslogtreecommitdiffstats
path: root/Documentation
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2008-05-03 10:01:33 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2008-05-03 10:01:33 -0700
commitc36c804559d3a891a2e655ba8185b4fa7eaee156 (patch)
tree0a4092432229616b2fdc53d87ea32e944212c626 /Documentation
parentbe2e88011bd800222bfd7b477c727966f93186a9 (diff)
parent3b5750644b2ffa2a76fdfe7b4e00e4af2ecf3539 (diff)
downloadlinux-c36c804559d3a891a2e655ba8185b4fa7eaee156.tar.gz
linux-c36c804559d3a891a2e655ba8185b4fa7eaee156.tar.bz2
linux-c36c804559d3a891a2e655ba8185b4fa7eaee156.zip
Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: [POWERPC] Bolt in SLB entry for kernel stack on secondary cpus [POWERPC] PS3: Update ps3_defconfig [POWERPC] PS3: Remove unsupported wakeup sources [POWERPC] PS3: Make ps3_virq_setup and ps3_virq_destroy static [POWERPC] PS3: Add time include to lpm [POWERPC] Fix slb.c compile warnings [POWERPC] Xilinx: Fix compile warnings [POWERPC] Squash build warning for print of resource_size_t in fsl_soc.c [RAPIDIO] fix current kernel-doc notation [POWERPC] 86xx: mpc8610_hpcd: add support for PCI Express x8 slot Fix a potential issue in mpc52xx uart driver [POWERPC] mpc5200: Allow for fixed speed MII configurations [POWERPC] 86xx: Fix the wrong serial1 interrupt for 8610 board
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/powerpc/mpc52xx-device-tree-bindings.txt11
1 files changed, 11 insertions, 0 deletions
diff --git a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
index cda7a7dffa6d..6f12f1c79c0c 100644
--- a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
+++ b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
@@ -237,6 +237,17 @@ Each GPIO controller node should have the empty property gpio-controller and
according to the bit numbers in the GPIO control registers. The second cell
is for flags which is currently unsused.
+8) FEC nodes
+The FEC node can specify one of the following properties to configure
+the MII link:
+"fsl,7-wire-mode" - An empty property that specifies the link uses 7-wire
+ mode instead of MII
+"current-speed" - Specifies that the MII should be configured for a fixed
+ speed. This property should contain two cells. The
+ first cell specifies the speed in Mbps and the second
+ should be '0' for half duplex and '1' for full duplex
+"phy-handle" - Contains a phandle to an Ethernet PHY.
+
IV - Extra Notes
================