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author | Dinh Nguyen <dinguyen@altera.com> | 2013-10-22 11:59:12 -0500 |
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committer | Wim Van Sebroeck <wim@iguana.be> | 2013-11-17 19:38:26 +0100 |
commit | 58e5637333afc2bb024ff8aef212311be0614d47 (patch) | |
tree | b8bb0fa442f29015eafbd1d89b3b9b7d7350331b /Documentation | |
parent | 487722cf2d66126338217896642bd5eec832c34b (diff) | |
download | linux-58e5637333afc2bb024ff8aef212311be0614d47.tar.gz linux-58e5637333afc2bb024ff8aef212311be0614d47.tar.bz2 linux-58e5637333afc2bb024ff8aef212311be0614d47.zip |
watchdog: dw: Enable OF support for DW watchdog timer
Add device tree support to the DW watchdog timer.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-watchdog@vger.kernel.org
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/watchdog/dw_wdt.txt | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/watchdog/dw_wdt.txt b/Documentation/devicetree/bindings/watchdog/dw_wdt.txt new file mode 100644 index 000000000000..08e16f684f2d --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/dw_wdt.txt @@ -0,0 +1,21 @@ +Synopsys Designware Watchdog Timer + +Required Properties: + +- compatible : Should contain "snps,dw-wdt" +- reg : Base address and size of the watchdog timer registers. +- clocks : phandle + clock-specifier for the clock that drives the + watchdog timer. + +Optional Properties: + +- interrupts : The interrupt used for the watchdog timeout warning. + +Example: + + watchdog0: wd@ffd02000 { + compatible = "snps,dw-wdt"; + reg = <0xffd02000 0x1000>; + interrupts = <0 171 4>; + clocks = <&per_base_clk>; + }; |