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authorLaxman Dewangan <ldewangan@nvidia.com>2013-08-21 16:18:16 +0530
committerMark Brown <broonie@linaro.org>2013-09-17 00:31:03 +0100
commit32b6d3f6027a05f42987f74deed48dc13cd5a11d (patch)
tree6461173e52d2f39d4b86193764dd3b1d3bbdadb2 /Documentation
parent272b98c6455f00884f0350f775c5342358ebb73f (diff)
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regulator: palmas: add support for external control of rails
Palmas rails like LDOs, SMPSs, REGENs, SYSENs can be enable and disable by register programming through I2C communication as well as it can be enable/disable with the external control input ENABLE1, ENABLE2 and NSLEEP. Add support for configuring these rails to be controlled by external control inputs. This is require to configure the rail's control register as well as configuration of resource register. Provide the external input names through parameter "roof-floor". Updated the DT binding document to details different value of the roof-floor. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/regulator/palmas-pmic.txt12
1 files changed, 9 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/regulator/palmas-pmic.txt b/Documentation/devicetree/bindings/regulator/palmas-pmic.txt
index 875639ae0606..42e6b6bc48ff 100644
--- a/Documentation/devicetree/bindings/regulator/palmas-pmic.txt
+++ b/Documentation/devicetree/bindings/regulator/palmas-pmic.txt
@@ -26,11 +26,17 @@ Optional nodes:
For ti,palmas-pmic - smps12, smps123, smps3 depending on OTP,
smps45, smps457, smps7 depending on variant, smps6, smps[8-9],
- smps10_out2, smps10_out1, do[1-9], ldoln, ldousb.
+ smps10_out2, smps10_out1, ldo[1-9], ldoln, ldousb.
Optional sub-node properties:
ti,warm-reset - maintain voltage during warm reset(boolean)
- ti,roof-floor - control voltage selection by pin(boolean)
+ ti,roof-floor - This takes as optional argument on platform supporting
+ the rail from desired external control. If there is no argument then
+ it will be assume that it is controlled by NSLEEP pin.
+ The valid value for external pins are:
+ ENABLE1 then 1,
+ ENABLE2 then 2 or
+ NSLEEP then 3.
ti,mode-sleep - mode to adopt in pmic sleep 0 - off, 1 - auto,
2 - eco, 3 - forced pwm
ti,smps-range - OTP has the wrong range set for the hardware so override
@@ -61,7 +67,7 @@ pmic {
regulator-always-on;
regulator-boot-on;
ti,warm-reset;
- ti,roof-floor;
+ ti,roof-floor = <1>; /* ENABLE1 control */
ti,mode-sleep = <0>;
ti,smps-range = <1>;
};