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authorMax Schwarz <max.schwarz@online.de>2014-06-11 22:34:37 +0200
committerWolfram Sang <wsa@the-dreams.de>2014-06-12 00:23:56 +0200
commitc41aa3ce938b684d853f1004072b6116a41bb1ce (patch)
tree56a0d8664801604142981ca7802208838b0cd611 /Documentation
parentc31c24b8251fd44962a9b0bf82c770653bf07f6e (diff)
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i2c: rk3x: add driver for Rockchip RK3xxx SoC I2C adapter
Driver for the native I2C adapter found in Rockchip RK3xxx SoCs. Configuration is only possible through devicetree. The driver is interrupt driven and supports the I2C_M_IGNORE_NAK mangling bit. Signed-off-by: Max Schwarz <max.schwarz@online.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c-rk3x.txt42
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+* Rockchip RK3xxx I2C controller
+
+This driver interfaces with the native I2C controller present in Rockchip
+RK3xxx SoCs.
+
+Required properties :
+
+ - reg : Offset and length of the register set for the device
+ - compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c" or
+ "rockchip,rk3288-i2c".
+ - interrupts : interrupt number
+ - clocks : parent clock
+
+Required on RK3066, RK3188 :
+
+ - rockchip,grf : the phandle of the syscon node for the general register
+ file (GRF)
+ - on those SoCs an alias with the correct I2C bus ID (bit offset in the GRF)
+ is also required.
+
+Optional properties :
+
+ - clock-frequency : SCL frequency to use (in Hz). If omitted, 100kHz is used.
+
+Example:
+
+aliases {
+ i2c0 = &i2c0;
+}
+
+i2c0: i2c@2002d000 {
+ compatible = "rockchip,rk3188-i2c";
+ reg = <0x2002d000 0x1000>;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rockchip,grf = <&grf>;
+
+ clock-names = "i2c";
+ clocks = <&cru PCLK_I2C0>;
+};