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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-08-05 10:12:23 -0700
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-08-05 10:12:23 -0700
commit0a1b6f63198f6e51d12c8d8c4ed4e7d759b3b73d (patch)
treec1abeac7eef4a6c3d25c25fcce3a727285e70e55 /Documentation
parentffe5adcb7661d94e952d6b5ed7f493cb4ef0c7bc (diff)
parent257d5d9a9f19ee6c6801589c74791d5422c374e9 (diff)
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Merge tag 'phy-for-4.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-linus
Kishon writes: phy: for 4.2-rc6 *) Fix compiler error when sun4i usb phy driver is built as module *) Fix SATA Lockup issue in dra7 SoC Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/phy/ti-phy.txt16
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 305e3df3d9b1..9cf9446eaf2e 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -82,6 +82,9 @@ Optional properties:
- id: If there are multiple instance of the same type, in order to
differentiate between each instance "id" can be used (e.g., multi-lane PCIe
PHY). If "id" is not provided, it is set to default value of '1'.
+ - syscon-pllreset: Handle to system control region that contains the
+ CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0
+ register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.
This is usually a subnode of ocp2scp to which it is connected.
@@ -100,3 +103,16 @@ usb3phy@4a084400 {
"sysclk",
"refclk";
};
+
+sata_phy: phy@4A096000 {
+ compatible = "ti,phy-pipe3-sata";
+ reg = <0x4A096000 0x80>, /* phy_rx */
+ <0x4A096400 0x64>, /* phy_tx */
+ <0x4A096800 0x40>; /* pll_ctrl */
+ reg-names = "phy_rx", "phy_tx", "pll_ctrl";
+ ctrl-module = <&omap_control_sata>;
+ clocks = <&sys_clkin1>, <&sata_ref_clk>;
+ clock-names = "sysclk", "refclk";
+ syscon-pllreset = <&scm_conf 0x3fc>;
+ #phy-cells = <0>;
+};