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authorGabriele Paoloni <gabriele.paoloni@huawei.com>2015-11-27 01:17:05 +0800
committerBjorn Helgaas <bhelgaas@google.com>2016-01-08 14:12:49 -0600
commit5930fe4edee072d403cfbafa0aacca78587edd73 (patch)
treeb64a3dd1055ba72e6b3b457176fc6ddec4642fa7 /Documentation
parent1ec218373b8ebda821aec00bb156a9c94fad9cd4 (diff)
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PCI: hisi: Add support for HiSilicon Hip06 PCIe host controllers
Add support for the HiSilicon Hip06 SoC. Documentation has been updated to include Hip06. Add Gabriele Paoloni as maintainer of the driver. Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/pci/hisilicon-pcie.txt8
1 files changed, 4 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt b/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
index 17c6ed9c6059..b721beacfe4d 100644
--- a/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
@@ -1,4 +1,4 @@
-HiSilicon PCIe host bridge DT description
+HiSilicon Hip05 and Hip06 PCIe host bridge DT description
HiSilicon PCIe host controller is based on Designware PCI core.
It shares common functions with PCIe Designware core driver and inherits
@@ -7,8 +7,8 @@ Documentation/devicetree/bindings/pci/designware-pci.txt.
Additional properties are described here:
-Required properties:
-- compatible: Should contain "hisilicon,hip05-pcie".
+Required properties
+- compatible: Should contain "hisilicon,hip05-pcie" or "hisilicon,hip06-pcie".
- reg: Should contain rc_dbi, config registers location and length.
- reg-names: Must include the following entries:
"rc_dbi": controller configuration registers;
@@ -20,7 +20,7 @@ Optional properties:
- status: Either "ok" or "disabled".
- dma-coherent: Present if DMA operations are coherent.
-Example:
+Hip05 Example (note that Hip06 is the same except compatible):
pcie@0xb0080000 {
compatible = "hisilicon,hip05-pcie", "snps,dw-pcie";
reg = <0 0xb0080000 0 0x10000>, <0x220 0x00000000 0 0x2000>;