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| author | Mathieu Poirier <mathieu.poirier@linaro.org> | 2015-05-13 10:34:20 -0600 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-05-24 11:11:21 -0700 |
| commit | a467dae11d57c60dabf9f85d7691e6ce097fc424 (patch) | |
| tree | b9f00ada69fcfaf8cea0489d42c2d6fd8e37a1e7 /Documentation | |
| parent | 40d8ebf0715f86b0231927a80bbc068869cc5ef1 (diff) | |
| download | linux-a467dae11d57c60dabf9f85d7691e6ce097fc424.tar.gz linux-a467dae11d57c60dabf9f85d7691e6ce097fc424.tar.bz2 linux-a467dae11d57c60dabf9f85d7691e6ce097fc424.zip | |
coresight-etm4x: Read only access to the main management registers
Having access to the ETMv4 management registers is very useful as they
give meaningful information on how the IP block has been configured at
synthesis time.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x index 648f28ded226..bde788dfd3f7 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x @@ -281,3 +281,80 @@ KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier@linaro.org> Description: (RW) Mask for all 8 virtual machine ID comparator value registers (if implemented). + +What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcoslsr +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier <mathieu.poirier@linaro.org> +Description: (R) Print the content of the OS Lock Status Register (0x304). + The value it taken directly from the HW. + +What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpdcr +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier <mathieu.poirier@linaro.org> +Description: (R) Print the content of the Power Down Control Register + (0x310). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpdsr +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier <mathieu.poirier@linaro.org> +Description: (R) Print the content of the Power Down Status Register + (0x314). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trclsr +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier <mathieu.poirier@linaro.org> +Description: (R) Print the content of the SW Lock Status Register + (0xFB4). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcauthstatus +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier <mathieu.poirier@linaro.org> +Description: (R) Print the content of the Authentication Status Register + (0xFB8). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcdevid +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier <mathieu.poirier@linaro.org> +Description: (R) Print the content of the Device ID Register + (0xFC8). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcdevtype +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier <mathieu.poirier@linaro.org> +Description: (R) Print the content of the Device Type Register + (0xFCC). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpidr0 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier <mathieu.poirier@linaro.org> +Description: (R) Print the content of the Peripheral ID0 Register + (0xFE0). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpidr1 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier <mathieu.poirier@linaro.org> +Description: (R) Print the content of the Peripheral ID1 Register + (0xFE4). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpidr2 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier <mathieu.poirier@linaro.org> +Description: (R) Print the content of the Peripheral ID2 Register + (0xFE8). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpidr3 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier <mathieu.poirier@linaro.org> +Description: (R) Print the content of the Peripheral ID3 Register + (0xFEC). The value is taken directly from the HW. |