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author | Miodrag Dinic <miodrag.dinic@mips.com> | 2017-12-29 16:41:45 +0100 |
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committer | Marc Zyngier <marc.zyngier@arm.com> | 2018-01-04 11:13:48 +0000 |
commit | c2ba80af4805543ace4928191d877ffe706087e1 (patch) | |
tree | bc9685c68dcb487655801b2ac84f4462cd3ed5c0 /Documentation | |
parent | 404e6bea10662f0e142748353169d25378271e49 (diff) | |
download | linux-c2ba80af4805543ace4928191d877ffe706087e1.tar.gz linux-c2ba80af4805543ace4928191d877ffe706087e1.tar.bz2 linux-c2ba80af4805543ace4928191d877ffe706087e1.zip |
dt-bindings/goldfish-pic: Add device tree binding for Goldfish PIC driver
Add documentation for DT binding of Goldfish PIC driver. The compatible
string used by OS for binding the driver is "google,goldfish-pic".
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt new file mode 100644 index 000000000000..35f752706e7d --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt @@ -0,0 +1,30 @@ +Android Goldfish PIC + +Android Goldfish programmable interrupt device used by Android +emulator. + +Required properties: + +- compatible : should contain "google,goldfish-pic" +- reg : <registers mapping> +- interrupts : <interrupt mapping> + +Example for mips when used in cascade mode: + + cpuintc { + #interrupt-cells = <0x1>; + #address-cells = <0>; + interrupt-controller; + compatible = "mti,cpu-interrupt-controller"; + }; + + interrupt-controller@1f000000 { + compatible = "google,goldfish-pic"; + reg = <0x1f000000 0x1000>; + + interrupt-controller; + #interrupt-cells = <0x1>; + + interrupt-parent = <&cpuintc>; + interrupts = <0x2>; + }; |