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author | Daniel Tang <dt.tangr@gmail.com> | 2013-06-01 16:02:37 +1000 |
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committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2013-06-06 17:23:13 +0200 |
commit | 77ba83bb1bb1cdabd522d32536f8eee65a870145 (patch) | |
tree | abb558298ffeccafa780996f2bcd90f17a893d43 /Documentation | |
parent | c19672492d233e0012b60fbfa460ffac1381ee26 (diff) | |
download | linux-77ba83bb1bb1cdabd522d32536f8eee65a870145.tar.gz linux-77ba83bb1bb1cdabd522d32536f8eee65a870145.tar.bz2 linux-77ba83bb1bb1cdabd522d32536f8eee65a870145.zip |
clocksource: Add TI-Nspire timer support
This patch adds a clocksource/clockevent driver for the timer found on some
models in the TI-Nspire calculator series. The timer has two 16bit subtimers
within its memory mapped I/O interface but only the first can generate
interrupts. The first subtimer is used to generate clockevents but only if an
interrupt number and register is given.
The interrupt acknowledgement mechanism is a little strange because the
interrupt mask and acknowledge registers are located in another memory mapped
I/O peripheral. The address of this register is passed to the driver through
device tree bindings.
The second subtimer is used as a clocksource because it isn't capable of
generating an interrupt. This subtimer is always added.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Daniel Tang <dt.tangr@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/timer/lsi,zevio-timer.txt | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/lsi,zevio-timer.txt b/Documentation/devicetree/bindings/timer/lsi,zevio-timer.txt new file mode 100644 index 000000000000..b2d07ad90e9a --- /dev/null +++ b/Documentation/devicetree/bindings/timer/lsi,zevio-timer.txt @@ -0,0 +1,33 @@ +TI-NSPIRE timer + +Required properties: + +- compatible : should be "lsi,zevio-timer". +- reg : The physical base address and size of the timer (always first). +- clocks: phandle to the source clock. + +Optional properties: + +- interrupts : The interrupt number of the first timer. +- reg : The interrupt acknowledgement registers + (always after timer base address) + +If any of the optional properties are not given, the timer is added as a +clock-source only. + +Example: + +timer { + compatible = "lsi,zevio-timer"; + reg = <0x900D0000 0x1000>, <0x900A0020 0x8>; + interrupts = <19>; + clocks = <&timer_clk>; +}; + +Example (no clock-events): + +timer { + compatible = "lsi,zevio-timer"; + reg = <0x900D0000 0x1000>; + clocks = <&timer_clk>; +}; |