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authorPaul Mackerras <paulus@samba.org>2013-04-17 20:32:26 +0000
committerAlexander Graf <agraf@suse.de>2013-04-26 20:27:34 +0200
commit8b78645c93b5d469e8006d68dbc92edc2640c654 (patch)
tree5f558213cc4bd2677069232d7dc1a78c96aee165 /Documentation
parentd19bd86204f85d42873e07bb64a27587fc380b5b (diff)
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KVM: PPC: Book3S: Facilities to save/restore XICS presentation ctrler state
This adds the ability for userspace to save and restore the state of the XICS interrupt presentation controllers (ICPs) via the KVM_GET/SET_ONE_REG interface. Since there is one ICP per vcpu, we simply define a new 64-bit register in the ONE_REG space for the ICP state. The state includes the CPU priority setting, the pending IPI priority, and the priority and source number of any pending external interrupt. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/virtual/kvm/api.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
index fb308be8521b..c09d1832e935 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -1808,6 +1808,7 @@ registers, find a list below:
PPC | KVM_REG_PPC_TLB2PS | 32
PPC | KVM_REG_PPC_TLB3PS | 32
PPC | KVM_REG_PPC_EPTCFG | 32
+ PPC | KVM_REG_PPC_ICP_STATE | 64
ARM registers are mapped using the lower 32 bits. The upper 16 of that
is the register group type, or coprocessor number: