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authorRob Herring <robh@kernel.org>2019-05-21 13:09:26 -0500
committerRob Herring <robh@kernel.org>2019-05-22 09:06:11 -0500
commit8d665693c28c88d38e4b7e015d3135c1875c89f6 (patch)
tree0e0935a9f107ac9074bb3e6dfaea1c7491114d16 /Documentation
parent31910f4476ce8b231164e7c0c17a87a8654bb5f2 (diff)
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dt-bindings: interrupt-controller: arm,gic: Fix schema errors in example
Validating the examples against the schema have a few errors: arm,gic.example.dt.yaml: 'ranges' does not match any of the regexes: '^v2m@[0-9a-f]+$', 'pinctrl-[0-9]+' arm,gic.example.dt.yaml: #address-cells:0:0: 2 is not one of [0, 1] arm,gic.example.dt.yaml: #size-cells:0:0: 1 was expected 'ranges' is valid, but missing from the schema, so add it. The reg addresses and sizes don't match the schema requirements and the example template. We could just override the example template to use 64-bit addresses, but there's not really any value showing that in the example. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml24
1 files changed, 13 insertions, 11 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
index 54838d4ea44c..9a47820ef346 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
@@ -92,6 +92,8 @@ properties:
minItems: 2
maxItems: 4
+ ranges: true
+
interrupts:
description: Interrupt source of the parent interrupt controller on
secondary GICs, or VGIC maintenance interrupt on primary GIC (see
@@ -197,28 +199,28 @@ examples:
interrupt-controller@e1101000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
- #address-cells = <2>;
- #size-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
interrupt-controller;
interrupts = <1 8 0xf04>;
- ranges = <0 0 0 0xe1100000 0 0x100000>;
- reg = <0x0 0xe1110000 0 0x01000>,
- <0x0 0xe112f000 0 0x02000>,
- <0x0 0xe1140000 0 0x10000>,
- <0x0 0xe1160000 0 0x10000>;
+ ranges = <0 0xe1100000 0x100000>;
+ reg = <0xe1110000 0x01000>,
+ <0xe112f000 0x02000>,
+ <0xe1140000 0x10000>,
+ <0xe1160000 0x10000>;
- v2m0: v2m@8000 {
+ v2m0: v2m@80000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0x0 0x80000 0 0x1000>;
+ reg = <0x80000 0x1000>;
};
//...
- v2mN: v2m@9000 {
+ v2mN: v2m@90000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0x0 0x90000 0 0x1000>;
+ reg = <0x90000 0x1000>;
};
};
...