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| author | Damien Riegel <damien.riegel@savoirfairelinux.com> | 2015-12-21 15:11:22 -0500 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2015-12-29 11:58:53 +0100 |
| commit | 0f6d785c847eeff55ae19546f5885156394be569 (patch) | |
| tree | b0f83c1845573270b6616eef720d2e5b92043c90 /Documentation | |
| parent | aff5e06b0dda7704ff2fa45162cfc4dde316a6f1 (diff) | |
| download | linux-0f6d785c847eeff55ae19546f5885156394be569.tar.gz linux-0f6d785c847eeff55ae19546f5885156394be569.tar.bz2 linux-0f6d785c847eeff55ae19546f5885156394be569.zip | |
irqchip/ts4800: Add documentation for TS-4800 interrupt controller
This is an interrupt-controller implemented in an FPGA, to multiplex
interrupts generated from other IPs. The FPGA usually uses a GPIO as a
parent interrupt controller to notify that one of the multiplexed
interrupts has triggered.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: kernel@savoirfairelinux.com
Link: http://lkml.kernel.org/r/1450728683-31416-1-git-send-email-damien.riegel@savoirfairelinux.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800.txt | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800.txt b/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800.txt new file mode 100644 index 000000000000..7f15f1b0325b --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800.txt @@ -0,0 +1,16 @@ +TS-4800 FPGA interrupt controller + +TS-4800 FPGA has an internal interrupt controller. When one of the +interrupts is triggered, the SoC is notified, usually using a GPIO as +parent interrupt source. + +Required properties: +- compatible: should be "technologic,ts4800-irqc" +- interrupt-controller: identifies the node as an interrupt controller +- reg: physical base address of the controller and length of memory mapped + region +- #interrupt-cells: specifies the number of cells needed to encode an interrupt + source, should be 1. +- interrupt-parent: phandle to the parent interrupt controller this one is + cascaded from +- interrupts: specifies the interrupt line in the interrupt-parent controller |