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authorClaudiu Beznea <claudiu.beznea@microchip.com>2020-01-10 18:18:03 +0200
committerAlexandre Belloni <alexandre.belloni@bootlin.com>2020-01-14 15:06:57 +0100
commit523752d8da38bed6ac8ecf674c96ebcbe7536122 (patch)
tree673706772527630830971532b6692fa06cdafce4 /Documentation
parente517d6d949a23a8738bcf4a62c81d7c0b44c5a4a (diff)
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dt-bindings: atmel-gpbr: add microchip,sam9x60-gpbr
Add microchip,sam9x60-gpbr to DT bindings documentation. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1578673089-3484-12-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/mfd/atmel-gpbr.txt4
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt b/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt
index a28569540683..e8c525569f10 100644
--- a/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt
+++ b/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt
@@ -3,7 +3,9 @@
The GPBR are a set of battery-backed registers.
Required properties:
-- compatible: "atmel,at91sam9260-gpbr", "syscon"
+- compatible: Should be one of the following:
+ "atmel,at91sam9260-gpbr", "syscon"
+ "microchip,sam9x60-gpbr", "syscon"
- reg: contains offset/length value of the GPBR memory
region.