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author | Vineet Gupta <vgupta@synopsys.com> | 2020-08-25 18:37:17 -0700 |
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committer | Vineet Gupta <vgupta@synopsys.com> | 2020-10-05 21:02:29 -0700 |
commit | dd7c7ab01a04d645b7e7baa8530bfd81e31a2202 (patch) | |
tree | 0560a3d6a1e267761641b89bab123c142a4019ec /arch/arc/include/asm/barrier.h | |
parent | 549738f15da0e5a00275977623be199fbbf7df50 (diff) | |
download | linux-dd7c7ab01a04d645b7e7baa8530bfd81e31a2202.tar.gz linux-dd7c7ab01a04d645b7e7baa8530bfd81e31a2202.tar.bz2 linux-dd7c7ab01a04d645b7e7baa8530bfd81e31a2202.zip |
ARC: [plat-eznps]: Drop support for EZChip NPS platform
NPS customers are no longer doing active development, as evident from
rand config build failures reported in recent times, so drop support
for NPS platform.
Tested-by: kernel test robot <lkp@intel.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include/asm/barrier.h')
-rw-r--r-- | arch/arc/include/asm/barrier.h | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/arch/arc/include/asm/barrier.h b/arch/arc/include/asm/barrier.h index 7823811e7cf5..4637de9e02fa 100644 --- a/arch/arc/include/asm/barrier.h +++ b/arch/arc/include/asm/barrier.h @@ -27,7 +27,7 @@ #define rmb() asm volatile("dmb 1\n" : : : "memory") #define wmb() asm volatile("dmb 2\n" : : : "memory") -#elif !defined(CONFIG_ARC_PLAT_EZNPS) /* CONFIG_ISA_ARCOMPACT */ +#else /* * ARCompact based cores (ARC700) only have SYNC instruction which is super @@ -37,13 +37,6 @@ #define mb() asm volatile("sync\n" : : : "memory") -#else /* CONFIG_ARC_PLAT_EZNPS */ - -#include <plat/ctop.h> - -#define mb() asm volatile (".word %0" : : "i"(CTOP_INST_SCHD_RW) : "memory") -#define rmb() asm volatile (".word %0" : : "i"(CTOP_INST_SCHD_RD) : "memory") - #endif #include <asm-generic/barrier.h> |