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authorAlexander Shiyan <shc_work@mail.ru>2014-04-16 11:24:52 +0400
committerShawn Guo <shawn.guo@freescale.com>2014-05-16 23:01:57 +0800
commit1ddcff4b52c99aaf501deb9a9f72ed1effa90627 (patch)
tree5b960ce5053de3620521114f98fa604a0dd03fd0 /arch/arm/boot/dts/imx51-babbage.dts
parent2ccc447cd5f91157e91e5835483dbdc8b7c0ad76 (diff)
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ARM: dts: imx51-babbage: Add missing pingroup for PMIC
This patch adds missing pin definition for PMIC IRQ GPIO. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx51-babbage.dts')
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index ad143eb9b5a9..1652f6aa1036 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -199,6 +199,8 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mc13892";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pmic>;
spi-max-frequency = <6000000>;
spi-cs-high;
reg = <0>;
@@ -490,6 +492,12 @@
>;
};
+ pinctrl_pmic: pmicgrp {
+ fsl,pins = <
+ MX51_PAD_GPIO1_8__GPIO1_8 0xe5 /* IRQ */
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX51_PAD_UART1_RXD__UART1_RXD 0x1c5