diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2012-09-06 09:08:24 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-09-17 23:20:22 +0100 |
commit | 4980f9bc2cec0f8ff0e0f2b021d46c7606ae1849 (patch) | |
tree | 0a840b3f1a2aa83836658efdf621654c0a6f2e5b /arch/arm/boot/dts/integratorcp.dts | |
parent | dc81df520bfb918a5cd4adc2ddcc7f1701fd1455 (diff) | |
download | linux-4980f9bc2cec0f8ff0e0f2b021d46c7606ae1849.tar.gz linux-4980f9bc2cec0f8ff0e0f2b021d46c7606ae1849.tar.bz2 linux-4980f9bc2cec0f8ff0e0f2b021d46c7606ae1849.zip |
ARM: 7517/1: integrator: initial device tree support
This is initial device tree support for the ARM Integrator family,
we create a very basic device tree, #ifdef out the non-DT machines
when compiling for device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/boot/dts/integratorcp.dts')
-rw-r--r-- | arch/arm/boot/dts/integratorcp.dts | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts new file mode 100644 index 000000000000..63033144442a --- /dev/null +++ b/arch/arm/boot/dts/integratorcp.dts @@ -0,0 +1,54 @@ +/* + * Device Tree for the ARM Integrator/CP platform + */ + +/dts-v1/; +/include/ "integrator.dtsi" + +/ { + model = "ARM Integrator/CP"; + compatible = "arm,integrator-cp"; + + aliases { + arm,timer-primary = &timer2; + arm,timer-secondary = &timer1; + }; + + chosen { + bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk"; + }; + + timer0: timer@13000000 { + compatible = "arm,sp804", "arm,primecell"; + }; + + timer1: timer@13000100 { + compatible = "arm,sp804", "arm,primecell"; + }; + + timer2: timer@13000200 { + compatible = "arm,sp804", "arm,primecell"; + }; + + pic: pic@14000000 { + valid-mask = <0x1fc003ff>; + }; + + cic: cic@10000040 { + compatible = "arm,versatile-fpga-irq"; + #interrupt-cells = <1>; + interrupt-controller; + reg = <0x10000040 0x100>; + clear-mask = <0xffffffff>; + valid-mask = <0x00000007>; + }; + + sic: sic@ca000000 { + compatible = "arm,versatile-fpga-irq"; + #interrupt-cells = <1>; + interrupt-controller; + reg = <0xca000000 0x100>; + clear-mask = <0x00000fff>; + valid-mask = <0x00000fff>; + }; +}; |