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authorEnric Balletbo i Serra <eballetbo@iseebcn.com>2014-11-06 13:01:49 +0100
committerTony Lindgren <tony@atomide.com>2014-11-12 07:04:37 -0800
commita7098bedd5522d0c498a09188a5625f8601adda8 (patch)
tree19f13726fa97d6355ab8bef733acc50756e7105f /arch/arm/boot/dts/omap3-igep0020-rev-f.dts
parentebc13bf2e0d261a93d25451e02e126a87fe88e28 (diff)
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ARM: dts: omap3-igep0020-rev-f: Support IGEPv2 Rev. F
Add support for the new hardware revision of the IGEPv2. Basically, the new revision F replaces the old Wifi module for a Wilink8 based module. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3-igep0020-rev-f.dts')
-rw-r--r--arch/arm/boot/dts/omap3-igep0020-rev-f.dts45
1 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3-igep0020-rev-f.dts b/arch/arm/boot/dts/omap3-igep0020-rev-f.dts
new file mode 100644
index 000000000000..cc8bd0cd8cf8
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-igep0020-rev-f.dts
@@ -0,0 +1,45 @@
+/*
+ * Device Tree Source for IGEPv2 Rev. F (TI OMAP AM/DM37x)
+ *
+ * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
+ * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "omap3-igep0020-common.dtsi"
+
+/ {
+ model = "IGEPv2 Rev. F (TI OMAP AM/DM37x)";
+ compatible = "isee,omap3-igep0020-rev-f", "ti,omap36xx", "ti,omap3";
+
+ /* Regulator to trigger the WL_EN signal of the Wifi module */
+ lbep5clwmc_wlen: regulator-lbep5clwmc-wlen {
+ compatible = "regulator-fixed";
+ regulator-name = "regulator-lbep5clwmc-wlen";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* gpio_139 - WL_EN */
+ enable-active-high;
+ };
+};
+
+&omap3_pmx_core {
+ lbep5clwmc_pins: pinmux_lbep5clwmc_pins {
+ pinctrl-single,pins = <
+ OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT | MUX_MODE4) /* mcspi1_cs3.gpio_177 - W_IRQ */
+ OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 - BT_EN */
+ OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 - WL_EN */
+ >;
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins &lbep5clwmc_pins>;
+ vmmc-supply = <&lbep5clwmc_wlen>;
+ bus-width = <4>;
+ non-removable;
+};