diff options
author | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-20 22:03:28 +0100 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-28 15:14:06 +0100 |
commit | 1eb3927c207e94e48db76b70a5238d68a8b7bdb2 (patch) | |
tree | 114d81cd3ccb0c0e2d8da96d5f88fe4ad0d480a4 /arch/arm/boot/dts/sun5i.dtsi | |
parent | a45207cef8a476be1443df6aeeecdf8495641b23 (diff) | |
download | linux-1eb3927c207e94e48db76b70a5238d68a8b7bdb2.tar.gz linux-1eb3927c207e94e48db76b70a5238d68a8b7bdb2.tar.bz2 linux-1eb3927c207e94e48db76b70a5238d68a8b7bdb2.zip |
ARM: dts: sun5i: Provide default muxing for relevant controllers
The I2C's, MMC0 and MMC1 controllers have only one muxing option in the
SoC. In such a case, we can just move the muxing into the DTSI, and remove
it from the DTS.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun5i.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun5i.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 5906d43ec4ed..5497d985c54a 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -326,6 +326,8 @@ clocks = <&ccu CLK_AHB_MMC0>, <&ccu CLK_MMC0>; clock-names = "ahb", "mmc"; interrupts = <32>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -678,6 +680,8 @@ reg = <0x01c2ac00 0x400>; interrupts = <7>; clocks = <&ccu CLK_APB1_I2C0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -688,6 +692,8 @@ reg = <0x01c2b000 0x400>; interrupts = <8>; clocks = <&ccu CLK_APB1_I2C1>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -698,6 +704,8 @@ reg = <0x01c2b400 0x400>; interrupts = <9>; clocks = <&ccu CLK_APB1_I2C2>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; |